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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) Low Power Island (LPI) TLMM block maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: | This binding describes the Top Level Mode Multiplexer block found in the LPASS LPI IP on most Qualcomm SoCs properties: compatible: const: qcom,sm8450-lpass-lpi-pinctrl reg: items: - description: LPASS LPI TLMM Control and Status registers - description: LPASS LPI pins SLEW registers clocks: items: - description: LPASS Core voting clock - description: LPASS Audio voting clock clock-names: items: - const: core - const: audio gpio-controller: true '#gpio-cells': description: Specifying the pin number and flags, as defined in include/dt-bindings/gpio/gpio.h const: 2 gpio-ranges: maxItems: 1 #PIN CONFIGURATION NODES patternProperties: '-pins$': type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: /schemas/pinctrl/pincfg-node.yaml properties: pins: description: List of gpio pins affected by the properties specified in this subnode. items: pattern: "^gpio([0-9]|[1-2][0-9]])$" function: enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk, dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data, qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws, i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk, wsa2_swr_data, i2s2_data, i2s4_ws, i2s4_clk, i2s4_data, slimbus_clk, i2s3_clk, i2s3_ws, i2s3_data, slimbus_data, ext_mclk1_c, ext_mclk1_b, ext_mclk1_a, ext_mclk1_d, ext_mclk1_e ] description: Specify the alternative function to be configured for the specified pins. drive-strength: enum: [2, 4, 6, 8, 10, 12, 14, 16] default: 2 description: Selects the drive strength for the specified pins, in mA. slew-rate: enum: [0, 1, 2, 3] default: 0 description: | 0: No adjustments 1: Higher Slew rate (faster edges) 2: Lower Slew rate (slower edges) 3: Reserved (No adjustments) bias-pull-down: true bias-pull-up: true bias-disable: true output-high: true output-low: true required: - pins - function additionalProperties: false allOf: - $ref: pinctrl.yaml# required: - compatible - reg - clocks - clock-names - gpio-controller - '#gpio-cells' - gpio-ranges additionalProperties: false examples: - | #include <dt-bindings/sound/qcom,q6afe.h> pinctrl@3440000 { compatible = "qcom,sm8450-lpass-lpi-pinctrl"; reg = <0x3440000 0x20000>, <0x34d0000 0x10000>; clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; clock-names = "core", "audio"; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpi_tlmm 0 0 23>; }; |