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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | // SPDX-License-Identifier: GPL-2.0 /***************************************************************************/ /* * m527x.c -- platform support for ColdFire 527x based boards * * Sub-architcture dependent initialization code for the Freescale * 5270/5271 and 5274/5275 CPUs. * * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com) * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com) */ /***************************************************************************/ #include <linux/clkdev.h> #include <linux/kernel.h> #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> #include <asm/mcfclk.h> /***************************************************************************/ DEFINE_CLK(pll, "pll.0", MCF_CLK); DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); static struct clk_lookup m527x_clk_lookup[] = { CLKDEV_INIT(NULL, "pll.0", &clk_pll), CLKDEV_INIT(NULL, "sys.0", &clk_sys), CLKDEV_INIT("mcfpit.0", NULL, &clk_pll), CLKDEV_INIT("mcfpit.1", NULL, &clk_pll), CLKDEV_INIT("mcfpit.2", NULL, &clk_pll), CLKDEV_INIT("mcfpit.3", NULL, &clk_pll), CLKDEV_INIT("mcfuart.0", NULL, &clk_sys), CLKDEV_INIT("mcfuart.1", NULL, &clk_sys), CLKDEV_INIT("mcfuart.2", NULL, &clk_sys), CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys), CLKDEV_INIT("fec.0", NULL, &clk_sys), CLKDEV_INIT("fec.1", NULL, &clk_sys), CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys), }; /***************************************************************************/ static void __init m527x_qspi_init(void) { #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) #if defined(CONFIG_M5271) u16 par; /* setup QSPS pins for QSPI with gpio CS control */ writeb(0x1f, MCFGPIO_PAR_QSPI); /* and CS2 & CS3 as gpio */ par = readw(MCFGPIO_PAR_TIMER); par &= 0x3f3f; writew(par, MCFGPIO_PAR_TIMER); #elif defined(CONFIG_M5275) /* setup QSPS pins for QSPI with gpio CS control */ writew(0x003e, MCFGPIO_PAR_QSPI); #endif #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ } /***************************************************************************/ static void __init m527x_i2c_init(void) { #if IS_ENABLED(CONFIG_I2C_IMX) #if defined(CONFIG_M5271) u8 par; /* setup Port FECI2C Pin Assignment Register for I2C */ /* set PAR_SCL to SCL and PAR_SDA to SDA */ par = readb(MCFGPIO_PAR_FECI2C); par |= 0x0f; writeb(par, MCFGPIO_PAR_FECI2C); #elif defined(CONFIG_M5275) u16 par; /* setup Port FECI2C Pin Assignment Register for I2C */ /* set PAR_SCL to SCL and PAR_SDA to SDA */ par = readw(MCFGPIO_PAR_FECI2C); par |= 0x0f; writew(par, MCFGPIO_PAR_FECI2C); #endif #endif /* IS_ENABLED(CONFIG_I2C_IMX) */ } /***************************************************************************/ static void __init m527x_uarts_init(void) { u16 sepmask; /* * External Pin Mask Setting & Enable External Pin for Interface */ sepmask = readw(MCFGPIO_PAR_UART); sepmask |= UART0_ENABLE_MASK | UART1_ENABLE_MASK | UART2_ENABLE_MASK; writew(sepmask, MCFGPIO_PAR_UART); } /***************************************************************************/ static void __init m527x_fec_init(void) { u8 v; /* Set multi-function pins to ethernet mode for fec0 */ #if defined(CONFIG_M5271) v = readb(MCFGPIO_PAR_FECI2C); writeb(v | 0xf0, MCFGPIO_PAR_FECI2C); #else u16 par; par = readw(MCFGPIO_PAR_FECI2C); writew(par | 0xf00, MCFGPIO_PAR_FECI2C); v = readb(MCFGPIO_PAR_FEC0HL); writeb(v | 0xc0, MCFGPIO_PAR_FEC0HL); /* Set multi-function pins to ethernet mode for fec1 */ par = readw(MCFGPIO_PAR_FECI2C); writew(par | 0xa0, MCFGPIO_PAR_FECI2C); v = readb(MCFGPIO_PAR_FEC1HL); writeb(v | 0xc0, MCFGPIO_PAR_FEC1HL); #endif } /***************************************************************************/ void __init config_BSP(char *commandp, int size) { mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); m527x_qspi_init(); m527x_i2c_init(); clkdev_add_table(m527x_clk_lookup, ARRAY_SIZE(m527x_clk_lookup)); } /***************************************************************************/ |