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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 | // SPDX-License-Identifier: GPL-2.0 #define _GNU_SOURCE #include <err.h> #include <errno.h> #include <pthread.h> #include <setjmp.h> #include <stdio.h> #include <string.h> #include <stdbool.h> #include <unistd.h> #include <x86intrin.h> #include <sys/auxv.h> #include <sys/mman.h> #include <sys/shm.h> #include <sys/syscall.h> #include <sys/wait.h> #include "../kselftest.h" /* For __cpuid_count() */ #ifndef __x86_64__ # error This test is 64-bit only #endif #define XSAVE_HDR_OFFSET 512 #define XSAVE_HDR_SIZE 64 struct xsave_buffer { union { struct { char legacy[XSAVE_HDR_OFFSET]; char header[XSAVE_HDR_SIZE]; char extended[0]; }; char bytes[0]; }; }; static inline uint64_t xgetbv(uint32_t index) { uint32_t eax, edx; asm volatile("xgetbv;" : "=a" (eax), "=d" (edx) : "c" (index)); return eax + ((uint64_t)edx << 32); } static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm) { uint32_t rfbm_lo = rfbm; uint32_t rfbm_hi = rfbm >> 32; asm volatile("xsave (%%rdi)" : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi) : "memory"); } static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm) { uint32_t rfbm_lo = rfbm; uint32_t rfbm_hi = rfbm >> 32; asm volatile("xrstor (%%rdi)" : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)); } /* err() exits and will not return */ #define fatal_error(msg, ...) err(1, "[FAIL]\t" msg, ##__VA_ARGS__) static void sethandler(int sig, void (*handler)(int, siginfo_t *, void *), int flags) { struct sigaction sa; memset(&sa, 0, sizeof(sa)); sa.sa_sigaction = handler; sa.sa_flags = SA_SIGINFO | flags; sigemptyset(&sa.sa_mask); if (sigaction(sig, &sa, 0)) fatal_error("sigaction"); } static void clearhandler(int sig) { struct sigaction sa; memset(&sa, 0, sizeof(sa)); sa.sa_handler = SIG_DFL; sigemptyset(&sa.sa_mask); if (sigaction(sig, &sa, 0)) fatal_error("sigaction"); } #define XFEATURE_XTILECFG 17 #define XFEATURE_XTILEDATA 18 #define XFEATURE_MASK_XTILECFG (1 << XFEATURE_XTILECFG) #define XFEATURE_MASK_XTILEDATA (1 << XFEATURE_XTILEDATA) #define XFEATURE_MASK_XTILE (XFEATURE_MASK_XTILECFG | XFEATURE_MASK_XTILEDATA) #define CPUID_LEAF1_ECX_XSAVE_MASK (1 << 26) #define CPUID_LEAF1_ECX_OSXSAVE_MASK (1 << 27) static inline void check_cpuid_xsave(void) { uint32_t eax, ebx, ecx, edx; /* * CPUID.1:ECX.XSAVE[bit 26] enumerates general * support for the XSAVE feature set, including * XGETBV. */ __cpuid_count(1, 0, eax, ebx, ecx, edx); if (!(ecx & CPUID_LEAF1_ECX_XSAVE_MASK)) fatal_error("cpuid: no CPU xsave support"); if (!(ecx & CPUID_LEAF1_ECX_OSXSAVE_MASK)) fatal_error("cpuid: no OS xsave support"); } static uint32_t xbuf_size; static struct { uint32_t xbuf_offset; uint32_t size; } xtiledata; #define CPUID_LEAF_XSTATE 0xd #define CPUID_SUBLEAF_XSTATE_USER 0x0 #define TILE_CPUID 0x1d #define TILE_PALETTE_ID 0x1 static void check_cpuid_xtiledata(void) { uint32_t eax, ebx, ecx, edx; __cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER, eax, ebx, ecx, edx); /* * EBX enumerates the size (in bytes) required by the XSAVE * instruction for an XSAVE area containing all the user state * components corresponding to bits currently set in XCR0. * * Stash that off so it can be used to allocate buffers later. */ xbuf_size = ebx; __cpuid_count(CPUID_LEAF_XSTATE, XFEATURE_XTILEDATA, eax, ebx, ecx, edx); /* * eax: XTILEDATA state component size * ebx: XTILEDATA state component offset in user buffer */ if (!eax || !ebx) fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d", eax, ebx); xtiledata.size = eax; xtiledata.xbuf_offset = ebx; } /* The helpers for managing XSAVE buffer and tile states: */ struct xsave_buffer *alloc_xbuf(void) { struct xsave_buffer *xbuf; /* XSAVE buffer should be 64B-aligned. */ xbuf = aligned_alloc(64, xbuf_size); if (!xbuf) fatal_error("aligned_alloc()"); return xbuf; } static inline void clear_xstate_header(struct xsave_buffer *buffer) { memset(&buffer->header, 0, sizeof(buffer->header)); } static inline uint64_t get_xstatebv(struct xsave_buffer *buffer) { /* XSTATE_BV is at the beginning of the header: */ return *(uint64_t *)&buffer->header; } static inline void set_xstatebv(struct xsave_buffer *buffer, uint64_t bv) { /* XSTATE_BV is at the beginning of the header: */ *(uint64_t *)(&buffer->header) = bv; } static void set_rand_tiledata(struct xsave_buffer *xbuf) { int *ptr = (int *)&xbuf->bytes[xtiledata.xbuf_offset]; int data; int i; /* * Ensure that 'data' is never 0. This ensures that * the registers are never in their initial configuration * and thus never tracked as being in the init state. */ data = rand() | 1; for (i = 0; i < xtiledata.size / sizeof(int); i++, ptr++) *ptr = data; } struct xsave_buffer *stashed_xsave; static void init_stashed_xsave(void) { stashed_xsave = alloc_xbuf(); if (!stashed_xsave) fatal_error("failed to allocate stashed_xsave\n"); clear_xstate_header(stashed_xsave); } static void free_stashed_xsave(void) { free(stashed_xsave); } /* See 'struct _fpx_sw_bytes' at sigcontext.h */ #define SW_BYTES_OFFSET 464 /* N.B. The struct's field name varies so read from the offset. */ #define SW_BYTES_BV_OFFSET (SW_BYTES_OFFSET + 8) static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *buffer) { return (struct _fpx_sw_bytes *)(buffer + SW_BYTES_OFFSET); } static inline uint64_t get_fpx_sw_bytes_features(void *buffer) { return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET); } /* Work around printf() being unsafe in signals: */ #define SIGNAL_BUF_LEN 1000 char signal_message_buffer[SIGNAL_BUF_LEN]; void sig_print(char *msg) { int left = SIGNAL_BUF_LEN - strlen(signal_message_buffer) - 1; strncat(signal_message_buffer, msg, left); } static volatile bool noperm_signaled; static int noperm_errs; /* * Signal handler for when AMX is used but * permission has not been obtained. */ static void handle_noperm(int sig, siginfo_t *si, void *ctx_void) { ucontext_t *ctx = (ucontext_t *)ctx_void; void *xbuf = ctx->uc_mcontext.fpregs; struct _fpx_sw_bytes *sw_bytes; uint64_t features; /* Reset the signal message buffer: */ signal_message_buffer[0] = '\0'; sig_print("\tAt SIGILL handler,\n"); if (si->si_code != ILL_ILLOPC) { noperm_errs++; sig_print("[FAIL]\tInvalid signal code.\n"); } else { sig_print("[OK]\tValid signal code (ILL_ILLOPC).\n"); } sw_bytes = get_fpx_sw_bytes(xbuf); /* * Without permission, the signal XSAVE buffer should not * have room for AMX register state (aka. xtiledata). * Check that the size does not overlap with where xtiledata * will reside. * * This also implies that no state components *PAST* * XTILEDATA (features >=19) can be present in the buffer. */ if (sw_bytes->xstate_size <= xtiledata.xbuf_offset) { sig_print("[OK]\tValid xstate size\n"); } else { noperm_errs++; sig_print("[FAIL]\tInvalid xstate size\n"); } features = get_fpx_sw_bytes_features(xbuf); /* * Without permission, the XTILEDATA feature * bit should not be set. */ if ((features & XFEATURE_MASK_XTILEDATA) == 0) { sig_print("[OK]\tValid xstate mask\n"); } else { noperm_errs++; sig_print("[FAIL]\tInvalid xstate mask\n"); } noperm_signaled = true; ctx->uc_mcontext.gregs[REG_RIP] += 3; /* Skip the faulting XRSTOR */ } /* Return true if XRSTOR is successful; otherwise, false. */ static inline bool xrstor_safe(struct xsave_buffer *xbuf, uint64_t mask) { noperm_signaled = false; xrstor(xbuf, mask); /* Print any messages produced by the signal code: */ printf("%s", signal_message_buffer); /* * Reset the buffer to make sure any future printing * only outputs new messages: */ signal_message_buffer[0] = '\0'; if (noperm_errs) fatal_error("saw %d errors in noperm signal handler\n", noperm_errs); return !noperm_signaled; } /* * Use XRSTOR to populate the XTILEDATA registers with * random data. * * Return true if successful; otherwise, false. */ static inline bool load_rand_tiledata(struct xsave_buffer *xbuf) { clear_xstate_header(xbuf); set_xstatebv(xbuf, XFEATURE_MASK_XTILEDATA); set_rand_tiledata(xbuf); return xrstor_safe(xbuf, XFEATURE_MASK_XTILEDATA); } /* Return XTILEDATA to its initial configuration. */ static inline void init_xtiledata(void) { clear_xstate_header(stashed_xsave); xrstor_safe(stashed_xsave, XFEATURE_MASK_XTILEDATA); } enum expected_result { FAIL_EXPECTED, SUCCESS_EXPECTED }; /* arch_prctl() and sigaltstack() test */ #define ARCH_GET_XCOMP_PERM 0x1022 #define ARCH_REQ_XCOMP_PERM 0x1023 static void req_xtiledata_perm(void) { syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA); } static void validate_req_xcomp_perm(enum expected_result exp) { unsigned long bitmask, expected_bitmask; long rc; rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_PERM, &bitmask); if (rc) { fatal_error("prctl(ARCH_GET_XCOMP_PERM) error: %ld", rc); } else if (!(bitmask & XFEATURE_MASK_XTILECFG)) { fatal_error("ARCH_GET_XCOMP_PERM returns XFEATURE_XTILECFG off."); } rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA); if (exp == FAIL_EXPECTED) { if (rc) { printf("[OK]\tARCH_REQ_XCOMP_PERM saw expected failure..\n"); return; } fatal_error("ARCH_REQ_XCOMP_PERM saw unexpected success.\n"); } else if (rc) { fatal_error("ARCH_REQ_XCOMP_PERM saw unexpected failure.\n"); } expected_bitmask = bitmask | XFEATURE_MASK_XTILEDATA; rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_PERM, &bitmask); if (rc) { fatal_error("prctl(ARCH_GET_XCOMP_PERM) error: %ld", rc); } else if (bitmask != expected_bitmask) { fatal_error("ARCH_REQ_XCOMP_PERM set a wrong bitmask: %lx, expected: %lx.\n", bitmask, expected_bitmask); } else { printf("\tARCH_REQ_XCOMP_PERM is successful.\n"); } } static void validate_xcomp_perm(enum expected_result exp) { bool load_success = load_rand_tiledata(stashed_xsave); if (exp == FAIL_EXPECTED) { if (load_success) { noperm_errs++; printf("[FAIL]\tLoad tiledata succeeded.\n"); } else { printf("[OK]\tLoad tiledata failed.\n"); } } else if (exp == SUCCESS_EXPECTED) { if (load_success) { printf("[OK]\tLoad tiledata succeeded.\n"); } else { noperm_errs++; printf("[FAIL]\tLoad tiledata failed.\n"); } } } #ifndef AT_MINSIGSTKSZ # define AT_MINSIGSTKSZ 51 #endif static void *alloc_altstack(unsigned int size) { void *altstack; altstack = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_STACK, -1, 0); if (altstack == MAP_FAILED) fatal_error("mmap() for altstack"); return altstack; } static void setup_altstack(void *addr, unsigned long size, enum expected_result exp) { stack_t ss; int rc; memset(&ss, 0, sizeof(ss)); ss.ss_size = size; ss.ss_sp = addr; rc = sigaltstack(&ss, NULL); if (exp == FAIL_EXPECTED) { if (rc) { printf("[OK]\tsigaltstack() failed.\n"); } else { fatal_error("sigaltstack() succeeded unexpectedly.\n"); } } else if (rc) { fatal_error("sigaltstack()"); } } static void test_dynamic_sigaltstack(void) { unsigned int small_size, enough_size; unsigned long minsigstksz; void *altstack; minsigstksz = getauxval(AT_MINSIGSTKSZ); printf("\tAT_MINSIGSTKSZ = %lu\n", minsigstksz); /* * getauxval() itself can return 0 for failure or * success. But, in this case, AT_MINSIGSTKSZ * will always return a >=0 value if implemented. * Just check for 0. */ if (minsigstksz == 0) { printf("no support for AT_MINSIGSTKSZ, skipping sigaltstack tests\n"); return; } enough_size = minsigstksz * 2; altstack = alloc_altstack(enough_size); printf("\tAllocate memory for altstack (%u bytes).\n", enough_size); /* * Try setup_altstack() with a size which can not fit * XTILEDATA. ARCH_REQ_XCOMP_PERM should fail. */ small_size = minsigstksz - xtiledata.size; printf("\tAfter sigaltstack() with small size (%u bytes).\n", small_size); setup_altstack(altstack, small_size, SUCCESS_EXPECTED); validate_req_xcomp_perm(FAIL_EXPECTED); /* * Try setup_altstack() with a size derived from * AT_MINSIGSTKSZ. It should be more than large enough * and thus ARCH_REQ_XCOMP_PERM should succeed. */ printf("\tAfter sigaltstack() with enough size (%u bytes).\n", enough_size); setup_altstack(altstack, enough_size, SUCCESS_EXPECTED); validate_req_xcomp_perm(SUCCESS_EXPECTED); /* * Try to coerce setup_altstack() to again accept a * too-small altstack. This ensures that big-enough * sigaltstacks can not shrink to a too-small value * once XTILEDATA permission is established. */ printf("\tThen, sigaltstack() with small size (%u bytes).\n", small_size); setup_altstack(altstack, small_size, FAIL_EXPECTED); } static void test_dynamic_state(void) { pid_t parent, child, grandchild; parent = fork(); if (parent < 0) { /* fork() failed */ fatal_error("fork"); } else if (parent > 0) { int status; /* fork() succeeded. Now in the parent. */ wait(&status); if (!WIFEXITED(status) || WEXITSTATUS(status)) fatal_error("arch_prctl test parent exit"); return; } /* fork() succeeded. Now in the child . */ printf("[RUN]\tCheck ARCH_REQ_XCOMP_PERM around process fork() and sigaltack() test.\n"); printf("\tFork a child.\n"); child = fork(); if (child < 0) { fatal_error("fork"); } else if (child > 0) { int status; wait(&status); if (!WIFEXITED(status) || WEXITSTATUS(status)) fatal_error("arch_prctl test child exit"); _exit(0); } /* * The permission request should fail without an * XTILEDATA-compatible signal stack */ printf("\tTest XCOMP_PERM at child.\n"); validate_xcomp_perm(FAIL_EXPECTED); /* * Set up an XTILEDATA-compatible signal stack and * also obtain permission to populate XTILEDATA. */ printf("\tTest dynamic sigaltstack at child:\n"); test_dynamic_sigaltstack(); /* Ensure that XTILEDATA can be populated. */ printf("\tTest XCOMP_PERM again at child.\n"); validate_xcomp_perm(SUCCESS_EXPECTED); printf("\tFork a grandchild.\n"); grandchild = fork(); if (grandchild < 0) { /* fork() failed */ fatal_error("fork"); } else if (!grandchild) { /* fork() succeeded. Now in the (grand)child. */ printf("\tTest XCOMP_PERM at grandchild.\n"); /* * Ensure that the grandchild inherited * permission and a compatible sigaltstack: */ validate_xcomp_perm(SUCCESS_EXPECTED); } else { int status; /* fork() succeeded. Now in the parent. */ wait(&status); if (!WIFEXITED(status) || WEXITSTATUS(status)) fatal_error("fork test grandchild"); } _exit(0); } /* * Save current register state and compare it to @xbuf1.' * * Returns false if @xbuf1 matches the registers. * Returns true if @xbuf1 differs from the registers. */ static inline bool __validate_tiledata_regs(struct xsave_buffer *xbuf1) { struct xsave_buffer *xbuf2; int ret; xbuf2 = alloc_xbuf(); if (!xbuf2) fatal_error("failed to allocate XSAVE buffer\n"); xsave(xbuf2, XFEATURE_MASK_XTILEDATA); ret = memcmp(&xbuf1->bytes[xtiledata.xbuf_offset], &xbuf2->bytes[xtiledata.xbuf_offset], xtiledata.size); free(xbuf2); if (ret == 0) return false; return true; } static inline void validate_tiledata_regs_same(struct xsave_buffer *xbuf) { int ret = __validate_tiledata_regs(xbuf); if (ret != 0) fatal_error("TILEDATA registers changed"); } static inline void validate_tiledata_regs_changed(struct xsave_buffer *xbuf) { int ret = __validate_tiledata_regs(xbuf); if (ret == 0) fatal_error("TILEDATA registers did not change"); } /* tiledata inheritance test */ static void test_fork(void) { pid_t child, grandchild; child = fork(); if (child < 0) { /* fork() failed */ fatal_error("fork"); } else if (child > 0) { /* fork() succeeded. Now in the parent. */ int status; wait(&status); if (!WIFEXITED(status) || WEXITSTATUS(status)) fatal_error("fork test child"); return; } /* fork() succeeded. Now in the child. */ printf("[RUN]\tCheck tile data inheritance.\n\tBefore fork(), load tiledata\n"); load_rand_tiledata(stashed_xsave); grandchild = fork(); if (grandchild < 0) { /* fork() failed */ fatal_error("fork"); } else if (grandchild > 0) { /* fork() succeeded. Still in the first child. */ int status; wait(&status); if (!WIFEXITED(status) || WEXITSTATUS(status)) fatal_error("fork test grand child"); _exit(0); } /* fork() succeeded. Now in the (grand)child. */ /* * TILEDATA registers are not preserved across fork(). * Ensure that their value has changed: */ validate_tiledata_regs_changed(stashed_xsave); _exit(0); } /* Context switching test */ static struct _ctxtswtest_cfg { unsigned int iterations; unsigned int num_threads; } ctxtswtest_config; struct futex_info { pthread_t thread; int nr; pthread_mutex_t mutex; struct futex_info *next; }; static void *check_tiledata(void *info) { struct futex_info *finfo = (struct futex_info *)info; struct xsave_buffer *xbuf; int i; xbuf = alloc_xbuf(); if (!xbuf) fatal_error("unable to allocate XSAVE buffer"); /* * Load random data into 'xbuf' and then restore * it to the tile registers themselves. */ load_rand_tiledata(xbuf); for (i = 0; i < ctxtswtest_config.iterations; i++) { pthread_mutex_lock(&finfo->mutex); /* * Ensure the register values have not * diverged from those recorded in 'xbuf'. */ validate_tiledata_regs_same(xbuf); /* Load new, random values into xbuf and registers */ load_rand_tiledata(xbuf); /* * The last thread's last unlock will be for * thread 0's mutex. However, thread 0 will * have already exited the loop and the mutex * will already be unlocked. * * Because this is not an ERRORCHECK mutex, * that inconsistency will be silently ignored. */ pthread_mutex_unlock(&finfo->next->mutex); } free(xbuf); /* * Return this thread's finfo, which is * a unique value for this thread. */ return finfo; } static int create_threads(int num, struct futex_info *finfo) { int i; for (i = 0; i < num; i++) { int next_nr; finfo[i].nr = i; /* * Thread 'i' will wait on this mutex to * be unlocked. Lock it immediately after * initialization: */ pthread_mutex_init(&finfo[i].mutex, NULL); pthread_mutex_lock(&finfo[i].mutex); next_nr = (i + 1) % num; finfo[i].next = &finfo[next_nr]; if (pthread_create(&finfo[i].thread, NULL, check_tiledata, &finfo[i])) fatal_error("pthread_create()"); } return 0; } static void affinitize_cpu0(void) { cpu_set_t cpuset; CPU_ZERO(&cpuset); CPU_SET(0, &cpuset); if (sched_setaffinity(0, sizeof(cpuset), &cpuset) != 0) fatal_error("sched_setaffinity to CPU 0"); } static void test_context_switch(void) { struct futex_info *finfo; int i; /* Affinitize to one CPU to force context switches */ affinitize_cpu0(); req_xtiledata_perm(); printf("[RUN]\tCheck tiledata context switches, %d iterations, %d threads.\n", ctxtswtest_config.iterations, ctxtswtest_config.num_threads); finfo = malloc(sizeof(*finfo) * ctxtswtest_config.num_threads); if (!finfo) fatal_error("malloc()"); create_threads(ctxtswtest_config.num_threads, finfo); /* * This thread wakes up thread 0 * Thread 0 will wake up 1 * Thread 1 will wake up 2 * ... * the last thread will wake up 0 * * ... this will repeat for the configured * number of iterations. */ pthread_mutex_unlock(&finfo[0].mutex); /* Wait for all the threads to finish: */ for (i = 0; i < ctxtswtest_config.num_threads; i++) { void *thread_retval; int rc; rc = pthread_join(finfo[i].thread, &thread_retval); if (rc) fatal_error("pthread_join() failed for thread %d err: %d\n", i, rc); if (thread_retval != &finfo[i]) fatal_error("unexpected thread retval for thread %d: %p\n", i, thread_retval); } printf("[OK]\tNo incorrect case was found.\n"); free(finfo); } int main(void) { /* Check hardware availability at first */ check_cpuid_xsave(); check_cpuid_xtiledata(); init_stashed_xsave(); sethandler(SIGILL, handle_noperm, 0); test_dynamic_state(); /* Request permission for the following tests */ req_xtiledata_perm(); test_fork(); ctxtswtest_config.iterations = 10; ctxtswtest_config.num_threads = 5; test_context_switch(); clearhandler(SIGILL); free_stashed_xsave(); return 0; } |