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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 | // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2010-2012 Broadcom. All rights reserved. * Copyright (c) 2013 Lubomir Rintel */ #include <linux/hw_random.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/printk.h> #include <linux/clk.h> #include <linux/reset.h> #define RNG_CTRL 0x0 #define RNG_STATUS 0x4 #define RNG_DATA 0x8 #define RNG_INT_MASK 0x10 /* enable rng */ #define RNG_RBGEN 0x1 /* the initial numbers generated are "less random" so will be discarded */ #define RNG_WARMUP_COUNT 0x40000 #define RNG_INT_OFF 0x1 struct bcm2835_rng_priv { struct hwrng rng; void __iomem *base; bool mask_interrupts; struct clk *clk; struct reset_control *reset; }; static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) { return container_of(rng, struct bcm2835_rng_priv, rng); } static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset) { /* MIPS chips strapped for BE will automagically configure the * peripheral registers for CPU-native byte order. */ if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) return __raw_readl(priv->base + offset); else return readl(priv->base + offset); } static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val, u32 offset) { if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) __raw_writel(val, priv->base + offset); else writel(val, priv->base + offset); } static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) { struct bcm2835_rng_priv *priv = to_rng_priv(rng); u32 max_words = max / sizeof(u32); u32 num_words, count; while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) { if (!wait) return 0; hwrng_yield(rng); } num_words = rng_readl(priv, RNG_STATUS) >> 24; if (num_words > max_words) num_words = max_words; for (count = 0; count < num_words; count++) ((u32 *)buf)[count] = rng_readl(priv, RNG_DATA); return num_words * sizeof(u32); } static int bcm2835_rng_init(struct hwrng *rng) { struct bcm2835_rng_priv *priv = to_rng_priv(rng); int ret = 0; u32 val; ret = clk_prepare_enable(priv->clk); if (ret) return ret; ret = reset_control_reset(priv->reset); if (ret) return ret; if (priv->mask_interrupts) { /* mask the interrupt */ val = rng_readl(priv, RNG_INT_MASK); val |= RNG_INT_OFF; rng_writel(priv, val, RNG_INT_MASK); } /* set warm-up count & enable */ rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS); rng_writel(priv, RNG_RBGEN, RNG_CTRL); return ret; } static void bcm2835_rng_cleanup(struct hwrng *rng) { struct bcm2835_rng_priv *priv = to_rng_priv(rng); /* disable rng hardware */ rng_writel(priv, 0, RNG_CTRL); clk_disable_unprepare(priv->clk); } struct bcm2835_rng_of_data { bool mask_interrupts; }; static const struct bcm2835_rng_of_data nsp_rng_of_data = { .mask_interrupts = true, }; static const struct of_device_id bcm2835_rng_of_match[] = { { .compatible = "brcm,bcm2835-rng"}, { .compatible = "brcm,bcm-nsp-rng", .data = &nsp_rng_of_data }, { .compatible = "brcm,bcm5301x-rng", .data = &nsp_rng_of_data }, { .compatible = "brcm,bcm6368-rng"}, {}, }; static int bcm2835_rng_probe(struct platform_device *pdev) { const struct bcm2835_rng_of_data *of_data; struct device *dev = &pdev->dev; const struct of_device_id *rng_id; struct bcm2835_rng_priv *priv; int err; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; platform_set_drvdata(pdev, priv); /* map peripheral */ priv->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); /* Clock is optional on most platforms */ priv->clk = devm_clk_get_optional(dev, NULL); if (IS_ERR(priv->clk)) return PTR_ERR(priv->clk); priv->reset = devm_reset_control_get_optional_exclusive(dev, NULL); if (IS_ERR(priv->reset)) return PTR_ERR(priv->reset); priv->rng.name = pdev->name; priv->rng.init = bcm2835_rng_init; priv->rng.read = bcm2835_rng_read; priv->rng.cleanup = bcm2835_rng_cleanup; if (dev_of_node(dev)) { rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node); if (!rng_id) return -EINVAL; /* Check for rng init function, execute it */ of_data = rng_id->data; if (of_data) priv->mask_interrupts = of_data->mask_interrupts; } /* register driver */ err = devm_hwrng_register(dev, &priv->rng); if (err) dev_err(dev, "hwrng registration failed\n"); else dev_info(dev, "hwrng registered\n"); return err; } MODULE_DEVICE_TABLE(of, bcm2835_rng_of_match); static const struct platform_device_id bcm2835_rng_devtype[] = { { .name = "bcm2835-rng" }, { .name = "bcm63xx-rng" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(platform, bcm2835_rng_devtype); static struct platform_driver bcm2835_rng_driver = { .driver = { .name = "bcm2835-rng", .of_match_table = bcm2835_rng_of_match, }, .probe = bcm2835_rng_probe, .id_table = bcm2835_rng_devtype, }; module_platform_driver(bcm2835_rng_driver); MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>"); MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver"); MODULE_LICENSE("GPL v2"); |