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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 | /* * Miscellaneous functions for IDT EB434 board * * Copyright 2004 IDT Inc. (rischelp@idt.com) * Copyright 2006 Phil Sutter <n0-1@freewrt.org> * Copyright 2007 Florian Fainelli <florian@openwrt.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/kernel.h> #include <linux/init.h> #include <linux/types.h> #include <linux/export.h> #include <linux/spinlock.h> #include <linux/platform_device.h> #include <linux/gpio/driver.h> #include <asm/mach-rc32434/rb.h> #include <asm/mach-rc32434/gpio.h> #define GPIOBASE 0x050000 /* Offsets relative to GPIOBASE */ #define GPIOFUNC 0x00 #define GPIOCFG 0x04 #define GPIOD 0x08 #define GPIOILEVEL 0x0C #define GPIOISTAT 0x10 #define GPIONMIEN 0x14 #define IMASK6 0x38 struct rb532_gpio_chip { struct gpio_chip chip; void __iomem *regbase; }; static struct resource rb532_gpio_reg0_res[] = { { .name = "gpio_reg0", .start = REGBASE + GPIOBASE, .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1, .flags = IORESOURCE_MEM, } }; /* rb532_set_bit - sanely set a bit * * bitval: new value for the bit * offset: bit index in the 4 byte address range * ioaddr: 4 byte aligned address being altered */ static inline void rb532_set_bit(unsigned bitval, unsigned offset, void __iomem *ioaddr) { unsigned long flags; u32 val; local_irq_save(flags); val = readl(ioaddr); val &= ~(!bitval << offset); /* unset bit if bitval == 0 */ val |= (!!bitval << offset); /* set bit if bitval == 1 */ writel(val, ioaddr); local_irq_restore(flags); } /* rb532_get_bit - read a bit * * returns the boolean state of the bit, which may be > 1 */ static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr) { return readl(ioaddr) & (1 << offset); } /* * Return GPIO level */ static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) { struct rb532_gpio_chip *gpch; gpch = gpiochip_get_data(chip); return !!rb532_get_bit(offset, gpch->regbase + GPIOD); } /* * Set output GPIO level */ static void rb532_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct rb532_gpio_chip *gpch; gpch = gpiochip_get_data(chip); rb532_set_bit(value, offset, gpch->regbase + GPIOD); } /* * Set GPIO direction to input */ static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { struct rb532_gpio_chip *gpch; gpch = gpiochip_get_data(chip); /* disable alternate function in case it's set */ rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); return 0; } /* * Set GPIO direction to output */ static int rb532_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { struct rb532_gpio_chip *gpch; gpch = gpiochip_get_data(chip); /* disable alternate function in case it's set */ rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); /* set the initial output value */ rb532_set_bit(value, offset, gpch->regbase + GPIOD); rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); return 0; } static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) { return 8 + 4 * 32 + gpio; } static struct rb532_gpio_chip rb532_gpio_chip[] = { [0] = { .chip = { .label = "gpio0", .direction_input = rb532_gpio_direction_input, .direction_output = rb532_gpio_direction_output, .get = rb532_gpio_get, .set = rb532_gpio_set, .to_irq = rb532_gpio_to_irq, .base = 0, .ngpio = 32, }, }, }; /* * Set GPIO interrupt level */ void rb532_gpio_set_ilevel(int bit, unsigned gpio) { rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); } EXPORT_SYMBOL(rb532_gpio_set_ilevel); /* * Set GPIO interrupt status */ void rb532_gpio_set_istat(int bit, unsigned gpio) { rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); } EXPORT_SYMBOL(rb532_gpio_set_istat); /* * Configure GPIO alternate function */ void rb532_gpio_set_func(unsigned gpio) { rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC); } EXPORT_SYMBOL(rb532_gpio_set_func); int __init rb532_gpio_init(void) { struct resource *r; r = rb532_gpio_reg0_res; rb532_gpio_chip->regbase = ioremap(r->start, resource_size(r)); if (!rb532_gpio_chip->regbase) { printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); return -ENXIO; } /* Register our GPIO chip */ gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip); return 0; } arch_initcall(rb532_gpio_init); |