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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2019 NXP * Copyright (c) 2019 Engicam srl * Copyright (c) 2020 Amarula Solutions(India) */ /dts-v1/; #include "imx8mm.dtsi" #include "imx8mm-icore-mx8mm.dtsi" / { model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit"; compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm", "fsl,imx8mm"; chosen { stdout-path = &uart2; }; }; &fec1 { status = "okay"; }; &i2c2 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &i2c4 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; }; &iomuxc { pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 >; }; pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 >; }; pinctrl_usdhc1_gpio: usdhc1gpiogrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 >; }; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; /* SD */ &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; max-frequency = <50000000>; bus-width = <4>; no-1-8-v; keep-power-in-suspend; status = "okay"; }; |