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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 | // SPDX-License-Identifier: GPL-2.0 /* * FPGA Bridge Framework Driver * * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved. * Copyright (C) 2017 Intel Corporation */ #include <linux/fpga/fpga-bridge.h> #include <linux/idr.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of_platform.h> #include <linux/slab.h> #include <linux/spinlock.h> static DEFINE_IDA(fpga_bridge_ida); static struct class *fpga_bridge_class; /* Lock for adding/removing bridges to linked lists*/ static spinlock_t bridge_list_lock; /** * fpga_bridge_enable - Enable transactions on the bridge * * @bridge: FPGA bridge * * Return: 0 for success, error code otherwise. */ int fpga_bridge_enable(struct fpga_bridge *bridge) { dev_dbg(&bridge->dev, "enable\n"); if (bridge->br_ops && bridge->br_ops->enable_set) return bridge->br_ops->enable_set(bridge, 1); return 0; } EXPORT_SYMBOL_GPL(fpga_bridge_enable); /** * fpga_bridge_disable - Disable transactions on the bridge * * @bridge: FPGA bridge * * Return: 0 for success, error code otherwise. */ int fpga_bridge_disable(struct fpga_bridge *bridge) { dev_dbg(&bridge->dev, "disable\n"); if (bridge->br_ops && bridge->br_ops->enable_set) return bridge->br_ops->enable_set(bridge, 0); return 0; } EXPORT_SYMBOL_GPL(fpga_bridge_disable); static struct fpga_bridge *__fpga_bridge_get(struct device *dev, struct fpga_image_info *info) { struct fpga_bridge *bridge; int ret = -ENODEV; bridge = to_fpga_bridge(dev); bridge->info = info; if (!mutex_trylock(&bridge->mutex)) { ret = -EBUSY; goto err_dev; } if (!try_module_get(dev->parent->driver->owner)) goto err_ll_mod; dev_dbg(&bridge->dev, "get\n"); return bridge; err_ll_mod: mutex_unlock(&bridge->mutex); err_dev: put_device(dev); return ERR_PTR(ret); } /** * of_fpga_bridge_get - get an exclusive reference to a fpga bridge * * @np: node pointer of a FPGA bridge * @info: fpga image specific information * * Return fpga_bridge struct if successful. * Return -EBUSY if someone already has a reference to the bridge. * Return -ENODEV if @np is not a FPGA Bridge. */ struct fpga_bridge *of_fpga_bridge_get(struct device_node *np, struct fpga_image_info *info) { struct device *dev; dev = class_find_device_by_of_node(fpga_bridge_class, np); if (!dev) return ERR_PTR(-ENODEV); return __fpga_bridge_get(dev, info); } EXPORT_SYMBOL_GPL(of_fpga_bridge_get); static int fpga_bridge_dev_match(struct device *dev, const void *data) { return dev->parent == data; } /** * fpga_bridge_get - get an exclusive reference to a fpga bridge * @dev: parent device that fpga bridge was registered with * @info: fpga manager info * * Given a device, get an exclusive reference to a fpga bridge. * * Return: fpga bridge struct or IS_ERR() condition containing error code. */ struct fpga_bridge *fpga_bridge_get(struct device *dev, struct fpga_image_info *info) { struct device *bridge_dev; bridge_dev = class_find_device(fpga_bridge_class, NULL, dev, fpga_bridge_dev_match); if (!bridge_dev) return ERR_PTR(-ENODEV); return __fpga_bridge_get(bridge_dev, info); } EXPORT_SYMBOL_GPL(fpga_bridge_get); /** * fpga_bridge_put - release a reference to a bridge * * @bridge: FPGA bridge */ void fpga_bridge_put(struct fpga_bridge *bridge) { dev_dbg(&bridge->dev, "put\n"); bridge->info = NULL; module_put(bridge->dev.parent->driver->owner); mutex_unlock(&bridge->mutex); put_device(&bridge->dev); } EXPORT_SYMBOL_GPL(fpga_bridge_put); /** * fpga_bridges_enable - enable bridges in a list * @bridge_list: list of FPGA bridges * * Enable each bridge in the list. If list is empty, do nothing. * * Return 0 for success or empty bridge list; return error code otherwise. */ int fpga_bridges_enable(struct list_head *bridge_list) { struct fpga_bridge *bridge; int ret; list_for_each_entry(bridge, bridge_list, node) { ret = fpga_bridge_enable(bridge); if (ret) return ret; } return 0; } EXPORT_SYMBOL_GPL(fpga_bridges_enable); /** * fpga_bridges_disable - disable bridges in a list * * @bridge_list: list of FPGA bridges * * Disable each bridge in the list. If list is empty, do nothing. * * Return 0 for success or empty bridge list; return error code otherwise. */ int fpga_bridges_disable(struct list_head *bridge_list) { struct fpga_bridge *bridge; int ret; list_for_each_entry(bridge, bridge_list, node) { ret = fpga_bridge_disable(bridge); if (ret) return ret; } return 0; } EXPORT_SYMBOL_GPL(fpga_bridges_disable); /** * fpga_bridges_put - put bridges * * @bridge_list: list of FPGA bridges * * For each bridge in the list, put the bridge and remove it from the list. * If list is empty, do nothing. */ void fpga_bridges_put(struct list_head *bridge_list) { struct fpga_bridge *bridge, *next; unsigned long flags; list_for_each_entry_safe(bridge, next, bridge_list, node) { fpga_bridge_put(bridge); spin_lock_irqsave(&bridge_list_lock, flags); list_del(&bridge->node); spin_unlock_irqrestore(&bridge_list_lock, flags); } } EXPORT_SYMBOL_GPL(fpga_bridges_put); /** * of_fpga_bridge_get_to_list - get a bridge, add it to a list * * @np: node pointer of a FPGA bridge * @info: fpga image specific information * @bridge_list: list of FPGA bridges * * Get an exclusive reference to the bridge and and it to the list. * * Return 0 for success, error code from of_fpga_bridge_get() othewise. */ int of_fpga_bridge_get_to_list(struct device_node *np, struct fpga_image_info *info, struct list_head *bridge_list) { struct fpga_bridge *bridge; unsigned long flags; bridge = of_fpga_bridge_get(np, info); if (IS_ERR(bridge)) return PTR_ERR(bridge); spin_lock_irqsave(&bridge_list_lock, flags); list_add(&bridge->node, bridge_list); spin_unlock_irqrestore(&bridge_list_lock, flags); return 0; } EXPORT_SYMBOL_GPL(of_fpga_bridge_get_to_list); /** * fpga_bridge_get_to_list - given device, get a bridge, add it to a list * * @dev: FPGA bridge device * @info: fpga image specific information * @bridge_list: list of FPGA bridges * * Get an exclusive reference to the bridge and and it to the list. * * Return 0 for success, error code from fpga_bridge_get() othewise. */ int fpga_bridge_get_to_list(struct device *dev, struct fpga_image_info *info, struct list_head *bridge_list) { struct fpga_bridge *bridge; unsigned long flags; bridge = fpga_bridge_get(dev, info); if (IS_ERR(bridge)) return PTR_ERR(bridge); spin_lock_irqsave(&bridge_list_lock, flags); list_add(&bridge->node, bridge_list); spin_unlock_irqrestore(&bridge_list_lock, flags); return 0; } EXPORT_SYMBOL_GPL(fpga_bridge_get_to_list); static ssize_t name_show(struct device *dev, struct device_attribute *attr, char *buf) { struct fpga_bridge *bridge = to_fpga_bridge(dev); return sprintf(buf, "%s\n", bridge->name); } static ssize_t state_show(struct device *dev, struct device_attribute *attr, char *buf) { struct fpga_bridge *bridge = to_fpga_bridge(dev); int enable = 1; if (bridge->br_ops && bridge->br_ops->enable_show) enable = bridge->br_ops->enable_show(bridge); return sprintf(buf, "%s\n", enable ? "enabled" : "disabled"); } static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RO(state); static struct attribute *fpga_bridge_attrs[] = { &dev_attr_name.attr, &dev_attr_state.attr, NULL, }; ATTRIBUTE_GROUPS(fpga_bridge); /** * fpga_bridge_create - create and initialize a struct fpga_bridge * @dev: FPGA bridge device from pdev * @name: FPGA bridge name * @br_ops: pointer to structure of fpga bridge ops * @priv: FPGA bridge private data * * The caller of this function is responsible for freeing the bridge with * fpga_bridge_free(). Using devm_fpga_bridge_create() instead is recommended. * * Return: struct fpga_bridge or NULL */ struct fpga_bridge *fpga_bridge_create(struct device *dev, const char *name, const struct fpga_bridge_ops *br_ops, void *priv) { struct fpga_bridge *bridge; int id, ret = 0; if (!name || !strlen(name)) { dev_err(dev, "Attempt to register with no name!\n"); return NULL; } bridge = kzalloc(sizeof(*bridge), GFP_KERNEL); if (!bridge) return NULL; id = ida_simple_get(&fpga_bridge_ida, 0, 0, GFP_KERNEL); if (id < 0) { ret = id; goto error_kfree; } mutex_init(&bridge->mutex); INIT_LIST_HEAD(&bridge->node); bridge->name = name; bridge->br_ops = br_ops; bridge->priv = priv; device_initialize(&bridge->dev); bridge->dev.groups = br_ops->groups; bridge->dev.class = fpga_bridge_class; bridge->dev.parent = dev; bridge->dev.of_node = dev->of_node; bridge->dev.id = id; ret = dev_set_name(&bridge->dev, "br%d", id); if (ret) goto error_device; return bridge; error_device: ida_simple_remove(&fpga_bridge_ida, id); error_kfree: kfree(bridge); return NULL; } EXPORT_SYMBOL_GPL(fpga_bridge_create); /** * fpga_bridge_free - free a fpga bridge created by fpga_bridge_create() * @bridge: FPGA bridge struct */ void fpga_bridge_free(struct fpga_bridge *bridge) { ida_simple_remove(&fpga_bridge_ida, bridge->dev.id); kfree(bridge); } EXPORT_SYMBOL_GPL(fpga_bridge_free); static void devm_fpga_bridge_release(struct device *dev, void *res) { struct fpga_bridge *bridge = *(struct fpga_bridge **)res; fpga_bridge_free(bridge); } /** * devm_fpga_bridge_create - create and init a managed struct fpga_bridge * @dev: FPGA bridge device from pdev * @name: FPGA bridge name * @br_ops: pointer to structure of fpga bridge ops * @priv: FPGA bridge private data * * This function is intended for use in a FPGA bridge driver's probe function. * After the bridge driver creates the struct with devm_fpga_bridge_create(), it * should register the bridge with fpga_bridge_register(). The bridge driver's * remove function should call fpga_bridge_unregister(). The bridge struct * allocated with this function will be freed automatically on driver detach. * This includes the case of a probe function returning error before calling * fpga_bridge_register(), the struct will still get cleaned up. * * Return: struct fpga_bridge or NULL */ struct fpga_bridge *devm_fpga_bridge_create(struct device *dev, const char *name, const struct fpga_bridge_ops *br_ops, void *priv) { struct fpga_bridge **ptr, *bridge; ptr = devres_alloc(devm_fpga_bridge_release, sizeof(*ptr), GFP_KERNEL); if (!ptr) return NULL; bridge = fpga_bridge_create(dev, name, br_ops, priv); if (!bridge) { devres_free(ptr); } else { *ptr = bridge; devres_add(dev, ptr); } return bridge; } EXPORT_SYMBOL_GPL(devm_fpga_bridge_create); /** * fpga_bridge_register - register a FPGA bridge * * @bridge: FPGA bridge struct * * Return: 0 for success, error code otherwise. */ int fpga_bridge_register(struct fpga_bridge *bridge) { struct device *dev = &bridge->dev; int ret; ret = device_add(dev); if (ret) return ret; of_platform_populate(dev->of_node, NULL, NULL, dev); dev_info(dev->parent, "fpga bridge [%s] registered\n", bridge->name); return 0; } EXPORT_SYMBOL_GPL(fpga_bridge_register); /** * fpga_bridge_unregister - unregister a FPGA bridge * * @bridge: FPGA bridge struct * * This function is intended for use in a FPGA bridge driver's remove function. */ void fpga_bridge_unregister(struct fpga_bridge *bridge) { /* * If the low level driver provides a method for putting bridge into * a desired state upon unregister, do it. */ if (bridge->br_ops && bridge->br_ops->fpga_bridge_remove) bridge->br_ops->fpga_bridge_remove(bridge); device_unregister(&bridge->dev); } EXPORT_SYMBOL_GPL(fpga_bridge_unregister); static void fpga_bridge_dev_release(struct device *dev) { } static int __init fpga_bridge_dev_init(void) { spin_lock_init(&bridge_list_lock); fpga_bridge_class = class_create(THIS_MODULE, "fpga_bridge"); if (IS_ERR(fpga_bridge_class)) return PTR_ERR(fpga_bridge_class); fpga_bridge_class->dev_groups = fpga_bridge_groups; fpga_bridge_class->dev_release = fpga_bridge_dev_release; return 0; } static void __exit fpga_bridge_dev_exit(void) { class_destroy(fpga_bridge_class); ida_destroy(&fpga_bridge_ida); } MODULE_DESCRIPTION("FPGA Bridge Driver"); MODULE_AUTHOR("Alan Tull <atull@kernel.org>"); MODULE_LICENSE("GPL v2"); subsys_initcall(fpga_bridge_dev_init); module_exit(fpga_bridge_dev_exit); |