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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) // // This file is provided under a dual BSD/GPLv2 license. When using or // redistributing this file, you may do so under either license. // // Copyright(c) 2018 Intel Corporation. All rights reserved. // // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> // Rander Wang <rander.wang@intel.com> // Keyon Jie <yang.jie@linux.intel.com> // /* * Hardware interface for generic Intel audio DSP HDA IP */ #include <sound/hda_register.h> #include <sound/pcm_params.h> #include "../sof-audio.h" #include "../ops.h" #include "hda.h" #define SDnFMT_BASE(x) ((x) << 14) #define SDnFMT_MULT(x) (((x) - 1) << 11) #define SDnFMT_DIV(x) (((x) - 1) << 8) #define SDnFMT_BITS(x) ((x) << 4) #define SDnFMT_CHAN(x) ((x) << 0) u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) { switch (rate) { case 8000: return SDnFMT_DIV(6); case 9600: return SDnFMT_DIV(5); case 11025: return SDnFMT_BASE(1) | SDnFMT_DIV(4); case 16000: return SDnFMT_DIV(3); case 22050: return SDnFMT_BASE(1) | SDnFMT_DIV(2); case 32000: return SDnFMT_DIV(3) | SDnFMT_MULT(2); case 44100: return SDnFMT_BASE(1); case 48000: return 0; case 88200: return SDnFMT_BASE(1) | SDnFMT_MULT(2); case 96000: return SDnFMT_MULT(2); case 176400: return SDnFMT_BASE(1) | SDnFMT_MULT(4); case 192000: return SDnFMT_MULT(4); default: dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", rate); return 0; /* use 48KHz if not found */ } }; u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) { switch (sample_bits) { case 8: return SDnFMT_BITS(0); case 16: return SDnFMT_BITS(1); case 20: return SDnFMT_BITS(2); case 24: return SDnFMT_BITS(3); case 32: return SDnFMT_BITS(4); default: dev_warn(sdev->dev, "can't find %d bits using 16bit\n", sample_bits); return SDnFMT_BITS(1); /* use 16bits format if not found */ } }; int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct sof_ipc_stream_params *ipc_params) { struct hdac_stream *hstream = substream->runtime->private_data; struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; struct snd_dma_buffer *dmab; struct sof_ipc_fw_version *v = &sdev->fw_ready.version; int ret; u32 size, rate, bits; size = params_buffer_bytes(params); rate = hda_dsp_get_mult_div(sdev, params_rate(params)); bits = hda_dsp_get_bits(sdev, params_width(params)); hstream->substream = substream; dmab = substream->runtime->dma_buffer_p; hstream->format_val = rate | bits | (params_channels(params) - 1); hstream->bufsize = size; hstream->period_bytes = params_period_bytes(params); hstream->no_period_wakeup = (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); ret = hda_dsp_stream_hw_params(sdev, stream, dmab, params); if (ret < 0) { dev_err(sdev->dev, "error: hdac prepare failed: %x\n", ret); return ret; } /* disable SPIB, to enable buffer wrap for stream */ hda_dsp_stream_spib_config(sdev, stream, HDA_DSP_SPIB_DISABLE, 0); /* update no_stream_position flag for ipc params */ if (hda && hda->no_ipc_position) { /* For older ABIs set host_period_bytes to zero to inform * FW we don't want position updates. Newer versions use * no_stream_position for this purpose. */ if (v->abi_version < SOF_ABI_VER(3, 10, 0)) ipc_params->host_period_bytes = 0; else ipc_params->no_stream_position = 1; } ipc_params->stream_tag = hstream->stream_tag; return 0; } int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream, int cmd) { struct hdac_stream *hstream = substream->runtime->private_data; struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); return hda_dsp_stream_trigger(sdev, stream, cmd); } snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_component *scomp = sdev->component; struct hdac_stream *hstream = substream->runtime->private_data; struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; struct snd_sof_pcm *spcm; snd_pcm_uframes_t pos; spcm = snd_sof_find_spcm_dai(scomp, rtd); if (!spcm) { dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", rtd->dai_link->id); return 0; } if (hda && !hda->no_ipc_position) { /* read position from IPC position */ pos = spcm->stream[substream->stream].posn.host_posn; goto found; } /* * DPIB/posbuf position mode: * For Playback, Use DPIB register from HDA space which * reflects the actual data transferred. * For Capture, Use the position buffer for pointer, as DPIB * is not accurate enough, its update may be completed * earlier than the data written to DDR. */ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, AZX_REG_VS_SDXDPIB_XBASE + (AZX_REG_VS_SDXDPIB_XINTERVAL * hstream->index)); } else { /* * For capture stream, we need more workaround to fix the * position incorrect issue: * * 1. Wait at least 20us before reading position buffer after * the interrupt generated(IOC), to make sure position update * happens on frame boundary i.e. 20.833uSec for 48KHz. * 2. Perform a dummy Read to DPIB register to flush DMA * position value. * 3. Read the DMA Position from posbuf. Now the readback * value should be >= period boundary. */ usleep_range(20, 21); snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, AZX_REG_VS_SDXDPIB_XBASE + (AZX_REG_VS_SDXDPIB_XINTERVAL * hstream->index)); pos = snd_hdac_stream_get_pos_posbuf(hstream); } if (pos >= hstream->bufsize) pos = 0; found: pos = bytes_to_frames(substream->runtime, pos); dev_vdbg(sdev->dev, "PCM: stream %d dir %d position %lu\n", hstream->index, substream->stream, pos); return pos; } int hda_dsp_pcm_open(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) { struct hdac_ext_stream *dsp_stream; int direction = substream->stream; dsp_stream = hda_dsp_stream_get(sdev, direction); if (!dsp_stream) { dev_err(sdev->dev, "error: no stream available\n"); return -ENODEV; } /* binding pcm substream to hda stream */ substream->runtime->private_data = &dsp_stream->hstream; return 0; } int hda_dsp_pcm_close(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) { struct hdac_stream *hstream = substream->runtime->private_data; int direction = substream->stream; int ret; ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); if (ret) { dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); return -ENODEV; } /* unbinding pcm substream to hda stream */ substream->runtime->private_data = NULL; return 0; } |