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Open Menu / Documentation / devicetree / bindings / media / qcom,sdm845-venus-v2.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Qualcomm Venus video encode and decode accelerators

maintainers:
  - Stanimir Varbanov <stanimir.varbanov@linaro.org>

description: |
  The Venus IP is a video encode and decode accelerator present
  on Qualcomm platforms

properties:
  compatible:
    const: qcom,sdm845-venus-v2

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  power-domains:
    maxItems: 3

  power-domain-names:
    items:
      - const: venus
      - const: vcodec0
      - const: vcodec1

  clocks:
    maxItems: 7

  clock-names:
    items:
      - const: core
      - const: iface
      - const: bus
      - const: vcodec0_core
      - const: vcodec0_bus
      - const: vcodec1_core
      - const: vcodec1_bus

  iommus:
    maxItems: 2

  memory-region:
    maxItems: 1

  video-core0:
    type: object

    properties:
      compatible:
        const: venus-decoder

    required:
      - compatible

    additionalProperties: false

  video-core1:
    type: object

    properties:
      compatible:
        const: venus-encoder

    required:
      - compatible

    additionalProperties: false

  video-firmware:
    type: object

    description: |
      Firmware subnode is needed when the platform does not
      have TrustZone.

    properties:
      iommus:
        maxItems: 1

    required:
      - iommus

required:
  - compatible
  - reg
  - interrupts
  - power-domains
  - power-domain-names
  - clocks
  - clock-names
  - iommus
  - memory-region
  - video-core0
  - video-core1

examples:
  - |
        #include <dt-bindings/interrupt-controller/arm-gic.h>
        #include <dt-bindings/clock/qcom,videocc-sdm845.h>

        video-codec@aa00000 {
                compatible = "qcom,sdm845-venus-v2";
                reg = <0 0x0aa00000 0 0xff000>;
                interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
                         <&videocc VIDEO_CC_VENUS_AHB_CLK>,
                         <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
                         <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
                         <&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
                         <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
                         <&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
                clock-names = "core", "iface", "bus",
                              "vcodec0_core", "vcodec0_bus",
                              "vcodec1_core", "vcodec1_bus";
                power-domains = <&videocc VENUS_GDSC>,
                                <&videocc VCODEC0_GDSC>,
                                <&videocc VCODEC1_GDSC>;
                power-domain-names = "venus", "vcodec0", "vcodec1";
                iommus = <&apps_smmu 0x10a0 0x8>,
                         <&apps_smmu 0x10b0 0x0>;
                memory-region = <&venus_mem>;

                video-core0 {
                        compatible = "venus-decoder";
                };

                video-core1 {
                        compatible = "venus-encoder";
                };
        };