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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2017-2019 NXP */ /dts-v1/; #include "imx8mq.dtsi" / { model = "Google i.MX8MQ Phanbell"; compatible = "google,imx8mq-phanbell", "fsl,imx8mq"; chosen { stdout-path = &uart1; }; memory@40000000 { device_type = "memory"; reg = <0x00000000 0x40000000 0 0x40000000>; }; pmic_osc: clock-pmic { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; clock-output-names = "pmic_osc"; }; reg_usdhc2_vmmc: regulator-usdhc2-vmmc { compatible = "regulator-fixed"; regulator-name = "VSD_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; &A53_0 { cpu-supply = <&buck2>; }; &A53_1 { cpu-supply = <&buck2>; }; &A53_2 { cpu-supply = <&buck2>; }; &A53_3 { cpu-supply = <&buck2>; }; &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; pmic: pmic@4b { compatible = "rohm,bd71837"; reg = <0x4b>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; #clock-cells = <0>; clocks = <&pmic_osc>; clock-output-names = "pmic_clk"; interrupt-parent = <&gpio1>; interrupts = <3 GPIO_ACTIVE_LOW>; regulators { buck1: BUCK1 { regulator-name = "buck1"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1300000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <1250>; rohm,dvs-run-voltage = <900000>; rohm,dvs-idle-voltage = <900000>; rohm,dvs-suspend-voltage = <800000>; }; buck2: BUCK2 { regulator-name = "buck2"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1000000>; regulator-boot-on; regulator-always-on; rohm,dvs-run-voltage = <1000000>; rohm,dvs-idle-voltage = <900000>; }; buck3: BUCK3 { regulator-name = "buck3"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1300000>; regulator-boot-on; rohm,dvs-run-voltage = <900000>; }; buck4: BUCK4 { regulator-name = "buck4"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1300000>; regulator-boot-on; regulator-always-on; rohm,dvs-run-voltage = <900000>; }; buck5: BUCK5 { regulator-name = "buck5"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1350000>; regulator-boot-on; regulator-always-on; }; buck6: BUCK6 { regulator-name = "buck6"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; buck7: BUCK7 { regulator-name = "buck7"; regulator-min-microvolt = <1605000>; regulator-max-microvolt = <1995000>; regulator-boot-on; regulator-always-on; }; buck8: BUCK8 { regulator-name = "buck8"; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1400000>; regulator-boot-on; regulator-always-on; }; ldo1: LDO1 { regulator-name = "ldo1"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; ldo2: LDO2 { regulator-name = "ldo2"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <900000>; regulator-boot-on; regulator-always-on; }; ldo3: LDO3 { regulator-name = "ldo3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; ldo4: LDO4 { regulator-name = "ldo4"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; ldo5: LDO5 { regulator-name = "ldo5"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; ldo6: LDO6 { regulator-name = "ldo6"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; ldo7: LDO7 { regulator-name = "ldo7"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; }; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-2 = <&pinctrl_usdhc1_200mhz>; bus-width = <8>; non-removable; status = "okay"; }; &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; bus-width = <4>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; status = "okay"; }; &usb3_phy0 { status = "okay"; }; &usb_dwc3_0 { dr_mode = "otg"; status = "okay"; }; &usb3_phy1 { status = "okay"; }; &usb_dwc3_1 { dr_mode = "host"; status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; status = "okay"; }; &iomuxc { pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f >; }; pinctrl_pmic: pmicirq { fsl,pins = < MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 >; }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 >; }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 >; }; pinctrl_usdhc2_gpio: usdhc2grpgpio { fsl,pins = < MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 >; }; pinctrl_usdhc2_100mhz: usdhc2grp100mhz { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 >; }; pinctrl_usdhc2_200mhz: usdhc2grp200mhz { fsl,pins = < MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 >; }; pinctrl_wdog: wdoggrp { fsl,pins = < MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 >; }; }; |