Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 | /* * Copyright 2019 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Author: AMD */ #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT #include "dc.h" #include "core_types.h" #include "dsc.h" #include <drm/drm_dp_helper.h> struct dc_dsc_policy { bool use_min_slices_h; int max_slices_h; // Maximum available if 0 int min_sice_height; // Must not be less than 8 int max_target_bpp; int min_target_bpp; // Minimum target bits per pixel }; const struct dc_dsc_policy dsc_policy = { .use_min_slices_h = true, // DSC Policy: Use minimum number of slices that fits the pixel clock .max_slices_h = 0, // DSC Policy: Use max available slices (in our case 4 for or 8, depending on the mode) .min_sice_height = 108, // DSC Policy: Use slice height recommended by VESA DSC Spreadsheet user guide .max_target_bpp = 16, .min_target_bpp = 8, }; /* This module's internal functions */ static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_block_size) { switch (dpcd_buff_block_size) { case DP_DSC_RC_BUF_BLK_SIZE_1: *buff_block_size = 1024; break; case DP_DSC_RC_BUF_BLK_SIZE_4: *buff_block_size = 4 * 1024; break; case DP_DSC_RC_BUF_BLK_SIZE_16: *buff_block_size = 16 * 1024; break; case DP_DSC_RC_BUF_BLK_SIZE_64: *buff_block_size = 64 * 1024; break; default: { dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); return false; } } return true; } static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *line_buff_bit_depth) { if (0 <= dpcd_line_buff_bit_depth && dpcd_line_buff_bit_depth <= 7) *line_buff_bit_depth = dpcd_line_buff_bit_depth + 9; else if (dpcd_line_buff_bit_depth == 8) *line_buff_bit_depth = 8; else { dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__); return false; } return true; } static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput) { switch (dpcd_throughput) { case DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED: *throughput = 0; break; case DP_DSC_THROUGHPUT_MODE_0_170: *throughput = 170; break; case DP_DSC_THROUGHPUT_MODE_0_340: *throughput = 340; break; case DP_DSC_THROUGHPUT_MODE_0_400: *throughput = 400; break; case DP_DSC_THROUGHPUT_MODE_0_450: *throughput = 450; break; case DP_DSC_THROUGHPUT_MODE_0_500: *throughput = 500; break; case DP_DSC_THROUGHPUT_MODE_0_550: *throughput = 550; break; case DP_DSC_THROUGHPUT_MODE_0_600: *throughput = 600; break; case DP_DSC_THROUGHPUT_MODE_0_650: *throughput = 650; break; case DP_DSC_THROUGHPUT_MODE_0_700: *throughput = 700; break; case DP_DSC_THROUGHPUT_MODE_0_750: *throughput = 750; break; case DP_DSC_THROUGHPUT_MODE_0_800: *throughput = 800; break; case DP_DSC_THROUGHPUT_MODE_0_850: *throughput = 850; break; case DP_DSC_THROUGHPUT_MODE_0_900: *throughput = 900; break; case DP_DSC_THROUGHPUT_MODE_0_950: *throughput = 950; break; case DP_DSC_THROUGHPUT_MODE_0_1000: *throughput = 1000; break; default: { dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__); return false; } } return true; } static bool dsc_bpp_increment_div_from_dpcd(int bpp_increment_dpcd, uint32_t *bpp_increment_div) { switch (bpp_increment_dpcd) { case 0: *bpp_increment_div = 16; break; case 1: *bpp_increment_div = 8; break; case 2: *bpp_increment_div = 4; break; case 3: *bpp_increment_div = 2; break; case 4: *bpp_increment_div = 1; break; default: { dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__); return false; } } return true; } static void get_dsc_enc_caps( const struct dc *dc, struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz) { // This is a static HW query, so we can use any DSC struct display_stream_compressor *dsc = dc->res_pool->dscs[0]; memset(dsc_enc_caps, 0, sizeof(struct dsc_enc_caps)); if (dsc) dsc->funcs->dsc_get_enc_caps(dsc_enc_caps, pixel_clock_100Hz); } /* Returns 'false' if no intersection was found for at least one capablity. * It also implicitly validates some sink caps against invalid value of zero. */ static bool intersect_dsc_caps( const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dsc_enc_caps *dsc_enc_caps, enum dc_pixel_encoding pixel_encoding, struct dsc_enc_caps *dsc_common_caps) { int32_t max_slices; int32_t total_sink_throughput; memset(dsc_common_caps, 0, sizeof(struct dsc_enc_caps)); dsc_common_caps->dsc_version = min(dsc_sink_caps->dsc_version, dsc_enc_caps->dsc_version); if (!dsc_common_caps->dsc_version) return false; dsc_common_caps->slice_caps.bits.NUM_SLICES_1 = dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_1; dsc_common_caps->slice_caps.bits.NUM_SLICES_2 = dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_2; dsc_common_caps->slice_caps.bits.NUM_SLICES_4 = dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_4; dsc_common_caps->slice_caps.bits.NUM_SLICES_8 = dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_8; if (!dsc_common_caps->slice_caps.raw) return false; dsc_common_caps->lb_bit_depth = min(dsc_sink_caps->lb_bit_depth, dsc_enc_caps->lb_bit_depth); if (!dsc_common_caps->lb_bit_depth) return false; dsc_common_caps->is_block_pred_supported = dsc_sink_caps->is_block_pred_supported && dsc_enc_caps->is_block_pred_supported; dsc_common_caps->color_formats.raw = dsc_sink_caps->color_formats.raw & dsc_enc_caps->color_formats.raw; if (!dsc_common_caps->color_formats.raw) return false; dsc_common_caps->color_depth.raw = dsc_sink_caps->color_depth.raw & dsc_enc_caps->color_depth.raw; if (!dsc_common_caps->color_depth.raw) return false; max_slices = 0; if (dsc_common_caps->slice_caps.bits.NUM_SLICES_1) max_slices = 1; if (dsc_common_caps->slice_caps.bits.NUM_SLICES_2) max_slices = 2; if (dsc_common_caps->slice_caps.bits.NUM_SLICES_4) max_slices = 4; total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_0_mps; if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420) total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_1_mps; dsc_common_caps->max_total_throughput_mps = min(total_sink_throughput, dsc_enc_caps->max_total_throughput_mps); dsc_common_caps->max_slice_width = min(dsc_sink_caps->max_slice_width, dsc_enc_caps->max_slice_width); if (!dsc_common_caps->max_slice_width) return false; dsc_common_caps->bpp_increment_div = min(dsc_sink_caps->bpp_increment_div, dsc_enc_caps->bpp_increment_div); // TODO DSC: Remove this workaround for N422 and 420 once it's fixed, or move it to get_dsc_encoder_caps() if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420) dsc_common_caps->bpp_increment_div = min(dsc_common_caps->bpp_increment_div, (uint32_t)8); return true; } static inline uint32_t dsc_div_by_10_round_up(uint32_t value) { return (value + 9) / 10; } static inline uint32_t calc_dsc_bpp_x16(uint32_t stream_bandwidth_kbps, uint32_t pix_clk_100hz, uint32_t bpp_increment_div) { uint32_t dsc_target_bpp_x16; float f_dsc_target_bpp; float f_stream_bandwidth_100bps = stream_bandwidth_kbps * 10.0f; uint32_t precision = bpp_increment_div; // bpp_increment_div is actually precision f_dsc_target_bpp = f_stream_bandwidth_100bps / pix_clk_100hz; // Round down to the nearest precision stop to bring it into DSC spec range dsc_target_bpp_x16 = (uint32_t)(f_dsc_target_bpp * precision); dsc_target_bpp_x16 = (dsc_target_bpp_x16 * 16) / precision; return dsc_target_bpp_x16; } /* Get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range, and timing's pixel clock * and uncompressed bandwidth. */ static void get_dsc_bandwidth_range( const uint32_t min_bpp, const uint32_t max_bpp, const struct dsc_enc_caps *dsc_caps, const struct dc_crtc_timing *timing, struct dc_dsc_bw_range *range) { /* native stream bandwidth */ range->stream_kbps = dc_bandwidth_in_kbps_from_timing(timing); /* max dsc target bpp */ range->max_kbps = dsc_div_by_10_round_up(max_bpp * timing->pix_clk_100hz); range->max_target_bpp_x16 = max_bpp * 16; if (range->max_kbps > range->stream_kbps) { /* max dsc target bpp is capped to native bandwidth */ range->max_kbps = range->stream_kbps; range->max_target_bpp_x16 = calc_dsc_bpp_x16(range->stream_kbps, timing->pix_clk_100hz, dsc_caps->bpp_increment_div); } /* min dsc target bpp */ range->min_kbps = dsc_div_by_10_round_up(min_bpp * timing->pix_clk_100hz); range->min_target_bpp_x16 = min_bpp * 16; if (range->min_kbps > range->max_kbps) { /* min dsc target bpp is capped to max dsc bandwidth*/ range->min_kbps = range->max_kbps; range->min_target_bpp_x16 = range->max_target_bpp_x16; } } /* Decides if DSC should be used and calculates target bpp if it should, applying DSC policy. * * Returns: * - 'true' if DSC was required by policy and was successfully applied * - 'false' if DSC was not necessary (e.g. if uncompressed stream fits 'target_bandwidth_kbps'), * or if it couldn't be applied based on DSC policy. */ static bool decide_dsc_target_bpp_x16( const struct dc_dsc_policy *policy, const struct dsc_enc_caps *dsc_common_caps, const int target_bandwidth_kbps, const struct dc_crtc_timing *timing, int *target_bpp_x16) { bool should_use_dsc = false; struct dc_dsc_bw_range range; memset(&range, 0, sizeof(range)); get_dsc_bandwidth_range(policy->min_target_bpp, policy->max_target_bpp, dsc_common_caps, timing, &range); if (target_bandwidth_kbps >= range.stream_kbps) { /* enough bandwidth without dsc */ *target_bpp_x16 = 0; should_use_dsc = false; } else if (target_bandwidth_kbps >= range.max_kbps) { /* use max target bpp allowed */ *target_bpp_x16 = range.max_target_bpp_x16; should_use_dsc = true; } else if (target_bandwidth_kbps >= range.min_kbps) { /* use target bpp that can take entire target bandwidth */ *target_bpp_x16 = calc_dsc_bpp_x16(target_bandwidth_kbps, timing->pix_clk_100hz, dsc_common_caps->bpp_increment_div); should_use_dsc = true; } else { /* not enough bandwidth to fulfill minimum requirement */ *target_bpp_x16 = 0; should_use_dsc = false; } return should_use_dsc; } #define MIN_AVAILABLE_SLICES_SIZE 4 static int get_available_dsc_slices(union dsc_enc_slice_caps slice_caps, int *available_slices) { int idx = 0; memset(available_slices, -1, MIN_AVAILABLE_SLICES_SIZE); if (slice_caps.bits.NUM_SLICES_1) available_slices[idx++] = 1; if (slice_caps.bits.NUM_SLICES_2) available_slices[idx++] = 2; if (slice_caps.bits.NUM_SLICES_4) available_slices[idx++] = 4; if (slice_caps.bits.NUM_SLICES_8) available_slices[idx++] = 8; return idx; } static int get_max_dsc_slices(union dsc_enc_slice_caps slice_caps) { int max_slices = 0; int available_slices[MIN_AVAILABLE_SLICES_SIZE]; int end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); if (end_idx > 0) max_slices = available_slices[end_idx - 1]; return max_slices; } // Increment sice number in available sice numbers stops if possible, or just increment if not static int inc_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices) { // Get next bigger num slices available in common caps int available_slices[MIN_AVAILABLE_SLICES_SIZE]; int end_idx; int i; int new_num_slices = num_slices; end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); if (end_idx == 0) { // No available slices found new_num_slices++; return new_num_slices; } // Numbers of slices found - get the next bigger number for (i = 0; i < end_idx; i++) { if (new_num_slices < available_slices[i]) { new_num_slices = available_slices[i]; break; } } if (new_num_slices == num_slices) // No biger number of slices found new_num_slices++; return new_num_slices; } // Decrement sice number in available sice numbers stops if possible, or just decrement if not. Stop at zero. static int dec_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices) { // Get next bigger num slices available in common caps int available_slices[MIN_AVAILABLE_SLICES_SIZE]; int end_idx; int i; int new_num_slices = num_slices; end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); if (end_idx == 0 && new_num_slices > 0) { // No numbers of slices found new_num_slices++; return new_num_slices; } // Numbers of slices found - get the next smaller number for (i = end_idx - 1; i >= 0; i--) { if (new_num_slices > available_slices[i]) { new_num_slices = available_slices[i]; break; } } if (new_num_slices == num_slices) { // No smaller number of slices found new_num_slices--; if (new_num_slices < 0) new_num_slices = 0; } return new_num_slices; } // Choose next bigger number of slices if the requested number of slices is not available static int fit_num_slices_up(union dsc_enc_slice_caps slice_caps, int num_slices) { // Get next bigger num slices available in common caps int available_slices[MIN_AVAILABLE_SLICES_SIZE]; int end_idx; int i; int new_num_slices = num_slices; end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); if (end_idx == 0) { // No available slices found new_num_slices++; return new_num_slices; } // Numbers of slices found - get the equal or next bigger number for (i = 0; i < end_idx; i++) { if (new_num_slices <= available_slices[i]) { new_num_slices = available_slices[i]; break; } } return new_num_slices; } /* Attempts to set DSC configuration for the stream, applying DSC policy. * Returns 'true' if successful or 'false' if not. * * Parameters: * * dsc_sink_caps - DSC sink decoder capabilities (from DPCD) * * dsc_enc_caps - DSC encoder capabilities * * target_bandwidth_kbps - Target bandwidth to fit the stream into. * If 0, do not calculate target bpp. * * timing - The stream timing to fit into 'target_bandwidth_kbps' or apply * maximum compression to, if 'target_badwidth == 0' * * dsc_cfg - DSC configuration to use if it was possible to come up with * one for the given inputs. * The target bitrate after DSC can be calculated by multiplying * dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g. * * dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0); */ static bool setup_dsc_config( const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dsc_enc_caps *dsc_enc_caps, int target_bandwidth_kbps, const struct dc_crtc_timing *timing, struct dc_dsc_config *dsc_cfg) { struct dsc_enc_caps dsc_common_caps; int max_slices_h; int min_slices_h; int num_slices_h; int pic_width; int slice_width; int target_bpp; int sink_per_slice_throughput_mps; int branch_max_throughput_mps = 0; bool is_dsc_possible = false; int pic_height; int slice_height; memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; if (!dsc_sink_caps->is_dsc_supported) goto done; if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width) goto done; // Intersect decoder with encoder DSC caps and validate DSC settings is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, dsc_enc_caps, timing->pixel_encoding, &dsc_common_caps); if (!is_dsc_possible) goto done; if (target_bandwidth_kbps > 0) { is_dsc_possible = decide_dsc_target_bpp_x16(&dsc_policy, &dsc_common_caps, target_bandwidth_kbps, timing, &target_bpp); dsc_cfg->bits_per_pixel = target_bpp; } if (!is_dsc_possible) goto done; sink_per_slice_throughput_mps = 0; // Validate available DSC settings against the mode timing // Validate color format (and pick up the throughput values) dsc_cfg->ycbcr422_simple = false; switch (timing->pixel_encoding) { case PIXEL_ENCODING_RGB: is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.RGB; sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps; break; case PIXEL_ENCODING_YCBCR444: is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_444; sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps; break; case PIXEL_ENCODING_YCBCR422: is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_422; sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps; branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps; if (!is_dsc_possible) { is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_SIMPLE_422; dsc_cfg->ycbcr422_simple = is_dsc_possible; sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; } break; case PIXEL_ENCODING_YCBCR420: is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_420; sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps; branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps; break; default: is_dsc_possible = false; } // Validate branch's maximum throughput if (branch_max_throughput_mps && dsc_div_by_10_round_up(timing->pix_clk_100hz) > branch_max_throughput_mps * 1000) is_dsc_possible = false; if (!is_dsc_possible) goto done; // Color depth switch (timing->display_color_depth) { case COLOR_DEPTH_888: is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_8_BPC; break; case COLOR_DEPTH_101010: is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_10_BPC; break; case COLOR_DEPTH_121212: is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_12_BPC; break; default: is_dsc_possible = false; } if (!is_dsc_possible) goto done; // Slice width (i.e. number of slices per line) max_slices_h = get_max_dsc_slices(dsc_common_caps.slice_caps); while (max_slices_h > 0) { if (pic_width % max_slices_h == 0) break; max_slices_h = dec_num_slices(dsc_common_caps.slice_caps, max_slices_h); } is_dsc_possible = (dsc_common_caps.max_slice_width > 0); if (!is_dsc_possible) goto done; min_slices_h = pic_width / dsc_common_caps.max_slice_width; if (pic_width % dsc_common_caps.max_slice_width) min_slices_h++; min_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, min_slices_h); while (min_slices_h <= max_slices_h) { int pix_clk_per_slice_khz = dsc_div_by_10_round_up(timing->pix_clk_100hz) / min_slices_h; if (pix_clk_per_slice_khz <= sink_per_slice_throughput_mps * 1000) break; min_slices_h = inc_num_slices(dsc_common_caps.slice_caps, min_slices_h); } if (pic_width % min_slices_h != 0) min_slices_h = 0; // DSC TODO: Maybe try increasing the number of slices first? is_dsc_possible = (min_slices_h <= max_slices_h); if (!is_dsc_possible) goto done; if (dsc_policy.use_min_slices_h) { if (min_slices_h > 0) num_slices_h = min_slices_h; else if (max_slices_h > 0) { // Fall back to max slices if min slices is not working out if (dsc_policy.max_slices_h) num_slices_h = min(dsc_policy.max_slices_h, max_slices_h); else num_slices_h = max_slices_h; } else is_dsc_possible = false; } else { if (max_slices_h > 0) { if (dsc_policy.max_slices_h) num_slices_h = min(dsc_policy.max_slices_h, max_slices_h); else num_slices_h = max_slices_h; } else if (min_slices_h > 0) // Fall back to min slices if max slices is not possible num_slices_h = min_slices_h; else is_dsc_possible = false; } if (!is_dsc_possible) goto done; dsc_cfg->num_slices_h = num_slices_h; slice_width = pic_width / num_slices_h; is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width; if (!is_dsc_possible) goto done; // Slice height (i.e. number of slices per column): start with policy and pick the first one that height is divisible by. // For 4:2:0 make sure the slice height is divisible by 2 as well. slice_height = min(dsc_policy.min_sice_height, pic_height); while (slice_height < pic_height && (pic_height % slice_height != 0 || (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0))) slice_height++; if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) // For the case when pic_height < dsc_policy.min_sice_height is_dsc_possible = (slice_height % 2 == 0); if (!is_dsc_possible) goto done; dsc_cfg->num_slices_v = pic_height/slice_height; // Final decission: can we do DSC or not? if (is_dsc_possible) { // Fill out the rest of DSC settings dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported; dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth; dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4; } done: if (!is_dsc_possible) memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); return is_dsc_possible; } bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps) { if (!dpcd_dsc_basic_data) return false; dsc_sink_caps->is_dsc_supported = (dpcd_dsc_basic_data[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_DECOMPRESSION_IS_SUPPORTED) != 0; if (!dsc_sink_caps->is_dsc_supported) return false; dsc_sink_caps->dsc_version = dpcd_dsc_basic_data[DP_DSC_REV - DP_DSC_SUPPORT]; { int buff_block_size; int buff_size; if (!dsc_buff_block_size_from_dpcd(dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT], &buff_block_size)) return false; buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT] + 1; dsc_sink_caps->rc_buffer_size = buff_size * buff_block_size; } dsc_sink_caps->slice_caps1.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT]; if (!dsc_line_buff_depth_from_dpcd(dpcd_dsc_basic_data[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT], &dsc_sink_caps->lb_bit_depth)) return false; dsc_sink_caps->is_block_pred_supported = (dpcd_dsc_basic_data[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_BLK_PREDICTION_IS_SUPPORTED) != 0; dsc_sink_caps->edp_max_bits_per_pixel = dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] | dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] << 8; dsc_sink_caps->color_formats.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT]; dsc_sink_caps->color_depth.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; { int dpcd_throughput = dpcd_dsc_basic_data[DP_DSC_PEAK_THROUGHPUT - DP_DSC_SUPPORT]; if (!dsc_throughput_from_dpcd(dpcd_throughput & DP_DSC_THROUGHPUT_MODE_0_MASK, &dsc_sink_caps->throughput_mode_0_mps)) return false; dpcd_throughput = (dpcd_throughput & DP_DSC_THROUGHPUT_MODE_1_MASK) >> DP_DSC_THROUGHPUT_MODE_1_SHIFT; if (!dsc_throughput_from_dpcd(dpcd_throughput, &dsc_sink_caps->throughput_mode_1_mps)) return false; } dsc_sink_caps->max_slice_width = dpcd_dsc_basic_data[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * 320; dsc_sink_caps->slice_caps2.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT]; if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT], &dsc_sink_caps->bpp_increment_div)) return false; /* Extended caps */ if (dpcd_dsc_ext_data == NULL) { // Extended DPCD DSC data can be null, e.g. because it doesn't apply to SST dsc_sink_caps->branch_overall_throughput_0_mps = 0; dsc_sink_caps->branch_overall_throughput_1_mps = 0; dsc_sink_caps->branch_max_line_width = 0; return true; } dsc_sink_caps->branch_overall_throughput_0_mps = dpcd_dsc_ext_data[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0]; if (dsc_sink_caps->branch_overall_throughput_0_mps == 0) dsc_sink_caps->branch_overall_throughput_0_mps = 0; else if (dsc_sink_caps->branch_overall_throughput_0_mps == 1) dsc_sink_caps->branch_overall_throughput_0_mps = 680; else { dsc_sink_caps->branch_overall_throughput_0_mps *= 50; dsc_sink_caps->branch_overall_throughput_0_mps += 600; } dsc_sink_caps->branch_overall_throughput_1_mps = dpcd_dsc_ext_data[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0]; if (dsc_sink_caps->branch_overall_throughput_1_mps == 0) dsc_sink_caps->branch_overall_throughput_1_mps = 0; else if (dsc_sink_caps->branch_overall_throughput_1_mps == 1) dsc_sink_caps->branch_overall_throughput_1_mps = 680; else { dsc_sink_caps->branch_overall_throughput_1_mps *= 50; dsc_sink_caps->branch_overall_throughput_1_mps += 600; } dsc_sink_caps->branch_max_line_width = dpcd_dsc_ext_data[DP_DSC_BRANCH_MAX_LINE_WIDTH - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320; ASSERT(dsc_sink_caps->branch_max_line_width == 0 || dsc_sink_caps->branch_max_line_width >= 5120); return true; } /* If DSC is possbile, get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range and * timing's pixel clock and uncompressed bandwidth. * If DSC is not possible, leave '*range' untouched. */ bool dc_dsc_compute_bandwidth_range( const struct dc *dc, const uint32_t min_bpp, const uint32_t max_bpp, const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dc_crtc_timing *timing, struct dc_dsc_bw_range *range) { bool is_dsc_possible = false; struct dsc_enc_caps dsc_enc_caps; struct dsc_enc_caps dsc_common_caps; struct dc_dsc_config config; get_dsc_enc_caps(dc, &dsc_enc_caps, timing->pix_clk_100hz); is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps, timing->pixel_encoding, &dsc_common_caps); if (is_dsc_possible) is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing, &config); if (is_dsc_possible) get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range); return is_dsc_possible; } bool dc_dsc_compute_config( const struct dc *dc, const struct dsc_dec_dpcd_caps *dsc_sink_caps, uint32_t target_bandwidth_kbps, const struct dc_crtc_timing *timing, struct dc_dsc_config *dsc_cfg) { bool is_dsc_possible = false; struct dsc_enc_caps dsc_enc_caps; get_dsc_enc_caps(dc, &dsc_enc_caps, timing->pix_clk_100hz); is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, target_bandwidth_kbps, timing, dsc_cfg); return is_dsc_possible; } #endif /* CONFIG_DRM_AMD_DC_DSC_SUPPORT */ |