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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2013 Gateworks Corporation */ #include <dt-bindings/gpio/gpio.h> / { /* these are used by bootloader for disabling nodes */ aliases { led0 = &led0; led1 = &led1; nand = &gpmi; usb0 = &usbh1; usb1 = &usbotg; }; chosen { bootargs = "console=ttymxc1,115200"; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; led0: user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; led1: user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x20000000>; }; pps { compatible = "pps-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pps>; gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; status = "okay"; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; reg_5p0v: regulator-5p0v { compatible = "regulator-fixed"; regulator-name = "5P0V"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; status = "okay"; }; &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; status = "okay"; }; &hdmi { ddc-i2c-bus = <&i2c3>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; eeprom1: eeprom@50 { compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; eeprom2: eeprom@51 { compatible = "atmel,24c02"; reg = <0x51>; pagesize = <16>; }; eeprom3: eeprom@52 { compatible = "atmel,24c02"; reg = <0x52>; pagesize = <16>; }; eeprom4: eeprom@53 { compatible = "atmel,24c02"; reg = <0x53>; pagesize = <16>; }; gpio: pca9555@23 { compatible = "nxp,pca9555"; reg = <0x23>; gpio-controller; #gpio-cells = <2>; }; rtc: ds1672@68 { compatible = "dallas,ds1672"; reg = <0x68>; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; ltc3676: pmic@3c { compatible = "lltc,ltc3676"; reg = <0x3c>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <8 IRQ_TYPE_EDGE_FALLING>; regulators { /* VDD_SOC (1+R1/R2 = 1.635) */ reg_vdd_soc: sw1 { regulator-name = "vddsoc"; regulator-min-microvolt = <674400>; regulator-max-microvolt = <1308000>; lltc,fb-voltage-divider = <127000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ reg_1p8v: sw2 { regulator-name = "vdd1p8"; regulator-min-microvolt = <1033310>; regulator-max-microvolt = <2004000>; lltc,fb-voltage-divider = <301000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_ARM (1+R1/R2 = 1.635) */ reg_vdd_arm: sw3 { regulator-name = "vddarm"; regulator-min-microvolt = <674400>; regulator-max-microvolt = <1308000>; lltc,fb-voltage-divider = <127000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_DDR (1+R1/R2 = 2.105) */ reg_vdd_ddr: sw4 { regulator-name = "vddddr"; regulator-min-microvolt = <868310>; regulator-max-microvolt = <1684000>; lltc,fb-voltage-divider = <221000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ reg_2p5v: ldo2 { regulator-name = "vdd2p5"; regulator-min-microvolt = <2490375>; regulator-max-microvolt = <2490375>; lltc,fb-voltage-divider = <487000 200000>; regulator-boot-on; regulator-always-on; }; /* VDD_HIGH (1+R1/R2 = 4.17) */ reg_3p0v: ldo4 { regulator-name = "vdd3p0"; regulator-min-microvolt = <3023250>; regulator-max-microvolt = <3023250>; lltc,fb-voltage-divider = <634000 200000>; regulator-boot-on; regulator-always-on; }; }; }; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; adv7180: camera@20 { compatible = "adi,adv7180"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_adv7180>; reg = <0x20>; powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; interrupt-parent = <&gpio5>; interrupts = <23 IRQ_TYPE_LEVEL_LOW>; port { adv7180_to_ipu1_csi0_mux: endpoint { remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; bus-width = <8>; }; }; }; }; &ipu1_csi0_from_ipu1_csi0_mux { bus-width = <8>; }; &ipu1_csi0_mux_from_parallel_sensor { remote-endpoint = <&adv7180_to_ipu1_csi0_mux>; bus-width = <8>; }; &ipu1_csi0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0>; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; status = "okay"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ status = "disabled"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ status = "disabled"; }; &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ status = "disabled"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "okay"; }; &uart5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5>; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; status = "okay"; }; &usbh1 { status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; }; &iomuxc { pinctrl_adv7180: adv7180grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */ >; }; pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 >; }; pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 >; }; pinctrl_ipu1_csi0: ipu1csi0grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 >; }; pinctrl_pmic: pmicgrp { fsl,pins = < MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ >; }; pinctrl_pps: ppsgrp { fsl,pins = < MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 >; }; pinctrl_uart5: uart5grp { fsl,pins = < MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ >; }; pinctrl_wdog: wdoggrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 >; }; }; |