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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 | // SPDX-License-Identifier: GPL-2.0-only /* * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and * initial domain support. We also handle the DSDT _PRT callbacks for GSI's * used in HVM and initial domain mode (PV does not parse ACPI, so it has no * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and * 0xcf8 PCI configuration read/write. * * Author: Ryan Wilson <hap9@epoch.ncsc.mil> * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> * Stefano Stabellini <stefano.stabellini@eu.citrix.com> */ #include <linux/export.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/acpi.h> #include <linux/io.h> #include <asm/io_apic.h> #include <asm/pci_x86.h> #include <asm/xen/hypervisor.h> #include <xen/features.h> #include <xen/events.h> #include <asm/xen/pci.h> #include <asm/xen/cpuid.h> #include <asm/apic.h> #include <asm/acpi.h> #include <asm/i8259.h> static int xen_pcifront_enable_irq(struct pci_dev *dev) { int rc; int share = 1; int pirq; u8 gsi; rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); if (rc < 0) { dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", rc); return rc; } /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ pirq = gsi; if (gsi < nr_legacy_irqs()) share = 0; rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); if (rc < 0) { dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n", gsi, pirq, rc); return rc; } dev->irq = rc; dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); return 0; } #ifdef CONFIG_ACPI static int xen_register_pirq(u32 gsi, int triggering, bool set_pirq) { int rc, pirq = -1, irq; struct physdev_map_pirq map_irq; int shareable = 0; char *name; irq = xen_irq_from_gsi(gsi); if (irq > 0) return irq; if (set_pirq) pirq = gsi; map_irq.domid = DOMID_SELF; map_irq.type = MAP_PIRQ_TYPE_GSI; map_irq.index = gsi; map_irq.pirq = pirq; rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); if (rc) { printk(KERN_WARNING "xen map irq failed %d\n", rc); return -1; } if (triggering == ACPI_EDGE_SENSITIVE) { shareable = 0; name = "ioapic-edge"; } else { shareable = 1; name = "ioapic-level"; } irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name); if (irq < 0) goto out; printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi); out: return irq; } static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, int trigger, int polarity) { if (!xen_hvm_domain()) return -1; return xen_register_pirq(gsi, trigger, false /* no mapping of GSI to PIRQ */); } #ifdef CONFIG_XEN_PV_DOM0 static int xen_register_gsi(u32 gsi, int triggering, int polarity) { int rc, irq; struct physdev_setup_gsi setup_gsi; if (!xen_pv_domain()) return -1; printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", gsi, triggering, polarity); irq = xen_register_pirq(gsi, triggering, true); setup_gsi.gsi = gsi; setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); if (rc == -EEXIST) printk(KERN_INFO "Already setup the GSI :%d\n", gsi); else if (rc) { printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n", gsi, rc); } return irq; } static int acpi_register_gsi_xen(struct device *dev, u32 gsi, int trigger, int polarity) { return xen_register_gsi(gsi, trigger, polarity); } #endif #endif #if defined(CONFIG_PCI_MSI) #include <linux/msi.h> struct xen_pci_frontend_ops *xen_pci_frontend; EXPORT_SYMBOL_GPL(xen_pci_frontend); struct xen_msi_ops { int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type); void (*teardown_msi_irqs)(struct pci_dev *dev); }; static struct xen_msi_ops xen_msi_ops __ro_after_init; static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { int irq, ret, i; struct msi_desc *msidesc; int *v; if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL); if (!v) return -ENOMEM; if (type == PCI_CAP_ID_MSIX) ret = xen_pci_frontend_enable_msix(dev, v, nvec); else ret = xen_pci_frontend_enable_msi(dev, v); if (ret) goto error; i = 0; for_each_pci_msi_entry(msidesc, dev) { irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], (type == PCI_CAP_ID_MSI) ? nvec : 1, (type == PCI_CAP_ID_MSIX) ? "pcifront-msi-x" : "pcifront-msi", DOMID_SELF); if (irq < 0) { ret = irq; goto free; } i++; } kfree(v); return 0; error: if (ret == -ENOSYS) dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n"); else if (ret) dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret); free: kfree(v); return ret; } static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, struct msi_msg *msg) { /* * We set vector == 0 to tell the hypervisor we don't care about * it, but we want a pirq setup instead. We use the dest_id fields * to pass the pirq that we want. */ memset(msg, 0, sizeof(*msg)); msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH; msg->arch_addr_hi.destid_8_31 = pirq >> 8; msg->arch_addr_lo.destid_0_7 = pirq & 0xFF; msg->arch_addr_lo.base_address = X86_MSI_BASE_ADDRESS_LOW; msg->arch_data.delivery_mode = APIC_DELIVERY_MODE_EXTINT; } static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { int irq, pirq; struct msi_desc *msidesc; struct msi_msg msg; if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; for_each_pci_msi_entry(msidesc, dev) { pirq = xen_allocate_pirq_msi(dev, msidesc); if (pirq < 0) { irq = -ENODEV; goto error; } xen_msi_compose_msg(dev, pirq, &msg); __pci_write_msi_msg(msidesc, &msg); dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq); irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, (type == PCI_CAP_ID_MSI) ? nvec : 1, (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi", DOMID_SELF); if (irq < 0) goto error; dev_dbg(&dev->dev, "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq); } return 0; error: dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n", type == PCI_CAP_ID_MSI ? "" : "-X", irq); return irq; } #ifdef CONFIG_XEN_PV_DOM0 static bool __read_mostly pci_seg_supported = true; static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { int ret = 0; struct msi_desc *msidesc; for_each_pci_msi_entry(msidesc, dev) { struct physdev_map_pirq map_irq; domid_t domid; domid = ret = xen_find_device_domain_owner(dev); /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED, * hence check ret value for < 0. */ if (ret < 0) domid = DOMID_SELF; memset(&map_irq, 0, sizeof(map_irq)); map_irq.domid = domid; map_irq.type = MAP_PIRQ_TYPE_MSI_SEG; map_irq.index = -1; map_irq.pirq = -1; map_irq.bus = dev->bus->number | (pci_domain_nr(dev->bus) << 16); map_irq.devfn = dev->devfn; if (type == PCI_CAP_ID_MSI && nvec > 1) { map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI; map_irq.entry_nr = nvec; } else if (type == PCI_CAP_ID_MSIX) { int pos; unsigned long flags; u32 table_offset, bir; pos = dev->msix_cap; pci_read_config_dword(dev, pos + PCI_MSIX_TABLE, &table_offset); bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR); flags = pci_resource_flags(dev, bir); if (!flags || (flags & IORESOURCE_UNSET)) return -EINVAL; map_irq.table_base = pci_resource_start(dev, bir); map_irq.entry_nr = msidesc->msi_attrib.entry_nr; } ret = -EINVAL; if (pci_seg_supported) ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) { /* * If MAP_PIRQ_TYPE_MULTI_MSI is not available * there's nothing else we can do in this case. * Just set ret > 0 so driver can retry with * single MSI. */ ret = 1; goto out; } if (ret == -EINVAL && !pci_domain_nr(dev->bus)) { map_irq.type = MAP_PIRQ_TYPE_MSI; map_irq.index = -1; map_irq.pirq = -1; map_irq.bus = dev->bus->number; ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); if (ret != -EINVAL) pci_seg_supported = false; } if (ret) { dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n", ret, domid); goto out; } ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq, (type == PCI_CAP_ID_MSI) ? nvec : 1, (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi", domid); if (ret < 0) goto out; } ret = 0; out: return ret; } static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) { int ret = 0; if (pci_seg_supported) { struct physdev_pci_device restore_ext; restore_ext.seg = pci_domain_nr(dev->bus); restore_ext.bus = dev->bus->number; restore_ext.devfn = dev->devfn; ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, &restore_ext); if (ret == -ENOSYS) pci_seg_supported = false; WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret); } if (!pci_seg_supported) { struct physdev_restore_msi restore; restore.bus = dev->bus->number; restore.devfn = dev->devfn; ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore); WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret); } } #else /* CONFIG_XEN_PV_DOM0 */ #define xen_initdom_setup_msi_irqs NULL #define xen_initdom_restore_msi_irqs NULL #endif /* !CONFIG_XEN_PV_DOM0 */ static void xen_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc; int i; for_each_pci_msi_entry(msidesc, dev) { if (msidesc->irq) { for (i = 0; i < msidesc->nvec_used; i++) xen_destroy_irq(msidesc->irq + i); } } } static void xen_pv_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc = first_pci_msi_entry(dev); if (msidesc->msi_attrib.is_msix) xen_pci_frontend_disable_msix(dev); else xen_pci_frontend_disable_msi(dev); xen_teardown_msi_irqs(dev); } static int xen_msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec) { int type; if (WARN_ON_ONCE(!dev_is_pci(dev))) return -EINVAL; if (first_msi_entry(dev)->msi_attrib.is_msix) type = PCI_CAP_ID_MSIX; else type = PCI_CAP_ID_MSI; return xen_msi_ops.setup_msi_irqs(to_pci_dev(dev), nvec, type); } static void xen_msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) { if (WARN_ON_ONCE(!dev_is_pci(dev))) return; xen_msi_ops.teardown_msi_irqs(to_pci_dev(dev)); } static struct msi_domain_ops xen_pci_msi_domain_ops = { .domain_alloc_irqs = xen_msi_domain_alloc_irqs, .domain_free_irqs = xen_msi_domain_free_irqs, }; static struct msi_domain_info xen_pci_msi_domain_info = { .ops = &xen_pci_msi_domain_ops, }; /* * This irq domain is a blatant violation of the irq domain design, but * distangling XEN into real irq domains is not a job for mere mortals with * limited XENology. But it's the least dangerous way for a mere mortal to * get rid of the arch_*_msi_irqs() hackery in order to store the irq * domain pointer in struct device. This irq domain wrappery allows to do * that without breaking XEN terminally. */ static __init struct irq_domain *xen_create_pci_msi_domain(void) { struct irq_domain *d = NULL; struct fwnode_handle *fn; fn = irq_domain_alloc_named_fwnode("XEN-MSI"); if (fn) d = msi_create_irq_domain(fn, &xen_pci_msi_domain_info, NULL); /* FIXME: No idea how to survive if this fails */ BUG_ON(!d); return d; } static __init void xen_setup_pci_msi(void) { if (xen_pv_domain()) { if (xen_initial_domain()) { xen_msi_ops.setup_msi_irqs = xen_initdom_setup_msi_irqs; x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; } else { xen_msi_ops.setup_msi_irqs = xen_setup_msi_irqs; } xen_msi_ops.teardown_msi_irqs = xen_pv_teardown_msi_irqs; pci_msi_ignore_mask = 1; } else if (xen_hvm_domain()) { xen_msi_ops.setup_msi_irqs = xen_hvm_setup_msi_irqs; xen_msi_ops.teardown_msi_irqs = xen_teardown_msi_irqs; } else { WARN_ON_ONCE(1); return; } /* * Override the PCI/MSI irq domain init function. No point * in allocating the native domain and never use it. */ x86_init.irqs.create_pci_msi_domain = xen_create_pci_msi_domain; } #else /* CONFIG_PCI_MSI */ static inline void xen_setup_pci_msi(void) { } #endif /* CONFIG_PCI_MSI */ int __init pci_xen_init(void) { if (!xen_pv_domain() || xen_initial_domain()) return -ENODEV; printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n"); pcibios_set_cache_line_size(); pcibios_enable_irq = xen_pcifront_enable_irq; pcibios_disable_irq = NULL; /* Keep ACPI out of the picture */ acpi_noirq_set(); xen_setup_pci_msi(); return 0; } #ifdef CONFIG_PCI_MSI static void __init xen_hvm_msi_init(void) { if (!disable_apic) { /* * If hardware supports (x2)APIC virtualization (as indicated * by hypervisor's leaf 4) then we don't need to use pirqs/ * event channels for MSI handling and instead use regular * APIC processing */ uint32_t eax = cpuid_eax(xen_cpuid_base() + 4); if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) || ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC))) return; } xen_setup_pci_msi(); } #endif int __init pci_xen_hvm_init(void) { if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs)) return 0; #ifdef CONFIG_ACPI /* * We don't want to change the actual ACPI delivery model, * just how GSIs get registered. */ __acpi_register_gsi = acpi_register_gsi_xen_hvm; __acpi_unregister_gsi = NULL; #endif #ifdef CONFIG_PCI_MSI /* * We need to wait until after x2apic is initialized * before we can set MSI IRQ ops. */ x86_platform.apic_post_init = xen_hvm_msi_init; #endif return 0; } #ifdef CONFIG_XEN_PV_DOM0 int __init pci_xen_initial_domain(void) { int irq; xen_setup_pci_msi(); __acpi_register_gsi = acpi_register_gsi_xen; __acpi_unregister_gsi = NULL; /* * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here * because we don't have a PIC and thus nr_legacy_irqs() is zero. */ for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { int trigger, polarity; if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) continue; xen_register_pirq(irq, trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE, true /* Map GSI to PIRQ */); } if (0 == nr_ioapics) { for (irq = 0; irq < nr_legacy_irqs(); irq++) xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic"); } return 0; } #endif #ifdef CONFIG_XEN_DOM0 struct xen_device_domain_owner { domid_t domain; struct pci_dev *dev; struct list_head list; }; static DEFINE_SPINLOCK(dev_domain_list_spinlock); static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list); static struct xen_device_domain_owner *find_device(struct pci_dev *dev) { struct xen_device_domain_owner *owner; list_for_each_entry(owner, &dev_domain_list, list) { if (owner->dev == dev) return owner; } return NULL; } int xen_find_device_domain_owner(struct pci_dev *dev) { struct xen_device_domain_owner *owner; int domain = -ENODEV; spin_lock(&dev_domain_list_spinlock); owner = find_device(dev); if (owner) domain = owner->domain; spin_unlock(&dev_domain_list_spinlock); return domain; } EXPORT_SYMBOL_GPL(xen_find_device_domain_owner); int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain) { struct xen_device_domain_owner *owner; owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL); if (!owner) return -ENODEV; spin_lock(&dev_domain_list_spinlock); if (find_device(dev)) { spin_unlock(&dev_domain_list_spinlock); kfree(owner); return -EEXIST; } owner->domain = domain; owner->dev = dev; list_add_tail(&owner->list, &dev_domain_list); spin_unlock(&dev_domain_list_spinlock); return 0; } EXPORT_SYMBOL_GPL(xen_register_device_domain_owner); int xen_unregister_device_domain_owner(struct pci_dev *dev) { struct xen_device_domain_owner *owner; spin_lock(&dev_domain_list_spinlock); owner = find_device(dev); if (!owner) { spin_unlock(&dev_domain_list_spinlock); return -ENODEV; } list_del(&owner->list); spin_unlock(&dev_domain_list_spinlock); kfree(owner); return 0; } EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner); #endif /* CONFIG_XEN_DOM0 */ |