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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 | // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. */ #include <linux/export.h> #include <linux/types.h> #include <linux/init.h> #include <linux/io.h> #include <linux/errno.h> #include <linux/spinlock.h> #include <linux/delay.h> #include <linux/clk.h> #include <video/imx-ipu-v3.h> #include "ipu-prv.h" struct ipu_smfc { struct ipu_smfc_priv *priv; int chno; bool inuse; }; struct ipu_smfc_priv { void __iomem *base; spinlock_t lock; struct ipu_soc *ipu; struct ipu_smfc channel[4]; int use_count; }; /*SMFC Registers */ #define SMFC_MAP 0x0000 #define SMFC_WMC 0x0004 #define SMFC_BS 0x0008 int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; u32 val, shift; spin_lock_irqsave(&priv->lock, flags); shift = smfc->chno * 4; val = readl(priv->base + SMFC_BS); val &= ~(0xf << shift); val |= burstsize << shift; writel(val, priv->base + SMFC_BS); spin_unlock_irqrestore(&priv->lock, flags); return 0; } EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize); int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; u32 val, shift; spin_lock_irqsave(&priv->lock, flags); shift = smfc->chno * 3; val = readl(priv->base + SMFC_MAP); val &= ~(0x7 << shift); val |= ((csi_id << 2) | mipi_id) << shift; writel(val, priv->base + SMFC_MAP); spin_unlock_irqrestore(&priv->lock, flags); return 0; } EXPORT_SYMBOL_GPL(ipu_smfc_map_channel); int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32 clr_level) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; u32 val, shift; spin_lock_irqsave(&priv->lock, flags); shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0); val = readl(priv->base + SMFC_WMC); val &= ~(0x3f << shift); val |= ((clr_level << 3) | set_level) << shift; writel(val, priv->base + SMFC_WMC); spin_unlock_irqrestore(&priv->lock, flags); return 0; } EXPORT_SYMBOL_GPL(ipu_smfc_set_watermark); int ipu_smfc_enable(struct ipu_smfc *smfc) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); if (!priv->use_count) ipu_module_enable(priv->ipu, IPU_CONF_SMFC_EN); priv->use_count++; spin_unlock_irqrestore(&priv->lock, flags); return 0; } EXPORT_SYMBOL_GPL(ipu_smfc_enable); int ipu_smfc_disable(struct ipu_smfc *smfc) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); priv->use_count--; if (!priv->use_count) ipu_module_disable(priv->ipu, IPU_CONF_SMFC_EN); if (priv->use_count < 0) priv->use_count = 0; spin_unlock_irqrestore(&priv->lock, flags); return 0; } EXPORT_SYMBOL_GPL(ipu_smfc_disable); struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno) { struct ipu_smfc_priv *priv = ipu->smfc_priv; struct ipu_smfc *smfc, *ret; unsigned long flags; if (chno >= 4) return ERR_PTR(-EINVAL); smfc = &priv->channel[chno]; ret = smfc; spin_lock_irqsave(&priv->lock, flags); if (smfc->inuse) { ret = ERR_PTR(-EBUSY); goto unlock; } smfc->inuse = true; unlock: spin_unlock_irqrestore(&priv->lock, flags); return ret; } EXPORT_SYMBOL_GPL(ipu_smfc_get); void ipu_smfc_put(struct ipu_smfc *smfc) { struct ipu_smfc_priv *priv = smfc->priv; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); smfc->inuse = false; spin_unlock_irqrestore(&priv->lock, flags); } EXPORT_SYMBOL_GPL(ipu_smfc_put); int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base) { struct ipu_smfc_priv *priv; int i; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; ipu->smfc_priv = priv; spin_lock_init(&priv->lock); priv->ipu = ipu; priv->base = devm_ioremap(dev, base, PAGE_SIZE); if (!priv->base) return -ENOMEM; for (i = 0; i < 4; i++) { priv->channel[i].priv = priv; priv->channel[i].chno = i; } pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, priv->base); return 0; } void ipu_smfc_exit(struct ipu_soc *ipu) { } |