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#include "imx8mm.dtsi" / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; reg_vref_1v8: regulator-vref-1v8 { compatible = "regulator-fixed"; regulator-name = "vref-1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; reg_vref_3v3: regulator-vref-3v3 { compatible = "regulator-fixed"; regulator-name = "vref-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; reg_wlan_vmmc: regulator-wlan-vmmc { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; regulator-name = "reg_wlan_vmmc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; enable-active-high; }; sound-wm8960 { audio-cpu = <&sai1>; audio-codec = <&wm8960>; audio-routing = "Headphone Jack", "HP_L", "Headphone Jack", "HP_R", "Ext Spk", "SPK_LP", "Ext Spk", "SPK_LN", "Ext Spk", "SPK_RP", "Ext Spk", "SPK_RN", "RINPUT1", "Mic Jack", "Mic Jack", "MICB"; compatible = "fsl,imx-audio-wm8960"; /* JD2: hp detect high for headphone*/ hp-det-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; /* Jack is not stuffed */ mic-det-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; model = "wm8960-audio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sound_wm8960>; }; }; &A53_0 { cpu-supply = <®_buck3>; }; &A53_1 { cpu-supply = <®_buck3>; }; &A53_2 { cpu-supply = <®_buck3>; }; &A53_3 { cpu-supply = <®_buck3>; }; /* J15 */ &ecspi2 { assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>; assigned-clock-rates = <40000000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; status = "okay"; }; &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; phy-mode = "rgmii-id"; phy-handle = <ðphy0>; fsl,magic-packet; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@4 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <4>; interrupts-extended = <&gpio3 16 IRQ_TYPE_LEVEL_LOW>; }; }; }; &flexspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexspi>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; pmic@8 { compatible = "nxp,pf8121a"; reg = <0x8>; regulators { reg_ldo1: ldo1 { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; }; reg_ldo2: ldo2 { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; }; reg_ldo3: ldo3 { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; }; reg_ldo4: ldo4 { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; }; reg_buck1: buck1 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck2: buck2 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck3: buck3 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck4: buck4 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck5: buck5 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck6: buck6 { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_buck7: buck7 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; reg_vsnvs: vsnvs { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; }; }; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; i2cmux@70 { compatible = "nxp,pca9540"; reg = <0x70>; #address-cells = <1>; #size-cells = <0>; i2c3@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; rtc@68 { compatible = "microcrystal,rv4162"; reg = <0x68>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3a_rv4162>; interrupts-extended = <&gpio4 22 IRQ_TYPE_LEVEL_LOW>; wakeup-source; }; }; }; }; &i2c4 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; wm8960: codec@1a { compatible = "wlf,wm8960"; reg = <0x1a>; clocks = <&clk IMX8MM_CLK_SAI1_ROOT>; clock-names = "mclk1"; wlf,shared-lrclk; #sound-dai-cells = <0>; }; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { assigned-clocks = <&clk IMX8MM_CLK_PWM2>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>; assigned-clock-rates = <40000000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; }; &sai1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1>; status = "okay"; }; &sai2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai2>; status = "okay"; }; /* BT */ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; uart-has-rtscts; status = "okay"; }; /* console */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; /* J15 */ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; uart-has-rtscts; status = "okay"; }; /* J9 */ &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; status = "okay"; }; /* eMMC */ &usdhc1 { bus-width = <8>; sdhci-caps-mask = <0x80000000 0x0>; non-removable; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-2 = <&pinctrl_usdhc1_200mhz>; vmmc-supply = <®_vref_3v3>; vqmmc-supply = <®_vref_1v8>; status = "okay"; }; /* sdcard */ &usdhc2 { bus-width = <4>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>; vqmmc-supply = <®_ldo2>; status = "okay"; }; /* wlan */ &usdhc3 { bus-width = <4>; sdhci-caps-mask = <0x2 0x0>; non-removable; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; vmmc-supply = <®_wlan_vmmc>; vqmmc-supply = <®_vref_1v8>; status = "okay"; }; /* USB OTG port */ &usbotg1 { dr_mode = "otg"; over-current-active-low; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg1>; power-active-high; status = "okay"; }; /* USB Host port */ &usbotg2 { dr_mode = "host"; over-current-active-low; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg2>; power-active-high; /* * FIXME: having USB2 enabled hangs the boot just after: *[ 1.655941] ci_hdrc ci_hdrc.1: EHCI Host Controller *[ 1.660880] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2 *[ 1.681505] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00 *[ 1.687730] hub 2-0:1.0: USB hub found *[ 1.691528] hub 2-0:1.0: 1 port detected */ status = "disabled"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x19 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x19 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x19 >; }; pinctrl_fec1: fec1grp { fsl,pins = < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159 >; }; pinctrl_flexspi: flexspigrp { fsl,pins = < MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 >; }; pinctrl_hog: hoggrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x09 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 >; }; pinctrl_i2c3a_rv4162: i2c3a-rv4162grp { fsl,pins = < MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0 >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x16 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x16 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x16 >; }; pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp { fsl,pins = < MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16 >; }; pinctrl_sai1: sai1grp { fsl,pins = < /* wm8960 */ MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6 MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6 MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6 MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6 MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0xd6 >; }; pinctrl_sai2: sai2grp { fsl,pins = < /* Bluetooth PCM */ MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 >; }; pinctrl_sound_wm8960: sound-wm8960grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x80 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x80 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 >; }; pinctrl_uart4: uart4grp { fsl,pins = < MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 >; }; pinctrl_usbotg1: usbotg1grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x16 MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x156 >; }; pinctrl_usbotg2: usbotg2grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR 0x16 MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC 0x15 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0 MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x141 >; }; pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { fsl,pins = < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4 >; }; pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { fsl,pins = < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x03 >; }; pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { fsl,pins = < MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 >; }; pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { fsl,pins = < MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 >; }; pinctrl_wdog: wdoggrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x140 >; }; }; |