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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 | // SPDX-License-Identifier: GPL-2.0 /* * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source * * Copyright (c) 2016 Samsung Electronics Co., Ltd. * Chanwoo Choi <cw00.choi@samsung.com> */ &soc { bus_g2d_400: bus0 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_G2D_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; status = "disabled"; }; bus_g2d_266: bus1 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_G2D_266>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_266_opp_table>; status = "disabled"; }; bus_gscl: bus2 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_GSCL_333>; clock-names = "bus"; operating-points-v2 = <&bus_gscl_opp_table>; status = "disabled"; }; bus_hevc: bus3 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_HEVC_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; status = "disabled"; }; bus_jpeg: bus4 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; status = "disabled"; }; bus_mfc: bus5 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_MFC_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; status = "disabled"; }; bus_mscl: bus6 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_MSCL_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; status = "disabled"; }; bus_noc0: bus7 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_BUS0_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; status = "disabled"; }; bus_noc1: bus8 { compatible = "samsung,exynos-bus"; clocks = <&cmu_top CLK_ACLK_BUS1_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; status = "disabled"; }; bus_noc2: bus9 { compatible = "samsung,exynos-bus"; clocks = <&cmu_mif CLK_ACLK_BUS2_400>; clock-names = "bus"; operating-points-v2 = <&bus_noc2_opp_table>; status = "disabled"; }; bus_g2d_400_opp_table: opp-table2 { compatible = "operating-points-v2"; opp-shared; opp-400000000 { opp-hz = /bits/ 64 <400000000>; opp-microvolt = <1075000>; }; opp-267000000 { opp-hz = /bits/ 64 <267000000>; opp-microvolt = <1000000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; opp-microvolt = <975000>; }; opp-160000000 { opp-hz = /bits/ 64 <160000000>; opp-microvolt = <962500>; }; opp-134000000 { opp-hz = /bits/ 64 <134000000>; opp-microvolt = <950000>; }; opp-100000000 { opp-hz = /bits/ 64 <100000000>; opp-microvolt = <937500>; }; }; bus_g2d_266_opp_table: opp-table3 { compatible = "operating-points-v2"; opp-267000000 { opp-hz = /bits/ 64 <267000000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; opp-160000000 { opp-hz = /bits/ 64 <160000000>; }; opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; }; bus_gscl_opp_table: opp-table4 { compatible = "operating-points-v2"; opp-333000000 { opp-hz = /bits/ 64 <333000000>; }; opp-222000000 { opp-hz = /bits/ 64 <222000000>; }; opp-166500000 { opp-hz = /bits/ 64 <166500000>; }; }; bus_hevc_opp_table: opp-table5 { compatible = "operating-points-v2"; opp-shared; opp-400000000 { opp-hz = /bits/ 64 <400000000>; }; opp-267000000 { opp-hz = /bits/ 64 <267000000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; opp-160000000 { opp-hz = /bits/ 64 <160000000>; }; opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; }; bus_noc2_opp_table: opp-table6 { compatible = "operating-points-v2"; opp-400000000 { opp-hz = /bits/ 64 <400000000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; }; }; |