Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 | // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) /* Copyright(c) 2014 - 2020 Intel Corporation */ #include <adf_accel_devices.h> #include <adf_common_drv.h> #include <adf_pf2vf_msg.h> #include "adf_c62x_hw_data.h" /* Worker thread to service arbiter mappings based on dev SKUs */ static const u32 thrd_to_arb_map_8_me_sku[] = { 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0, 0 }; static const u32 thrd_to_arb_map_10_me_sku[] = { 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA }; static struct adf_hw_device_class c62x_class = { .name = ADF_C62X_DEVICE_NAME, .type = DEV_C62X, .instances = 0 }; static u32 get_accel_mask(u32 fuse) { return (~fuse) >> ADF_C62X_ACCELERATORS_REG_OFFSET & ADF_C62X_ACCELERATORS_MASK; } static u32 get_ae_mask(u32 fuse) { return (~fuse) & ADF_C62X_ACCELENGINES_MASK; } static u32 get_num_accels(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->accel_mask) return 0; for (i = 0; i < ADF_C62X_MAX_ACCELERATORS; i++) { if (self->accel_mask & (1 << i)) ctr++; } return ctr; } static u32 get_num_aes(struct adf_hw_device_data *self) { u32 i, ctr = 0; if (!self || !self->ae_mask) return 0; for (i = 0; i < ADF_C62X_MAX_ACCELENGINES; i++) { if (self->ae_mask & (1 << i)) ctr++; } return ctr; } static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_PMISC_BAR; } static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_ETR_BAR; } static u32 get_sram_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_SRAM_BAR; } static enum dev_sku_info get_sku(struct adf_hw_device_data *self) { int aes = get_num_aes(self); if (aes == 8) return DEV_SKU_2; else if (aes == 10) return DEV_SKU_4; return DEV_SKU_UNKNOWN; } static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, u32 const **arb_map_config) { switch (accel_dev->accel_pci_dev.sku) { case DEV_SKU_2: *arb_map_config = thrd_to_arb_map_8_me_sku; break; case DEV_SKU_4: *arb_map_config = thrd_to_arb_map_10_me_sku; break; default: dev_err(&GET_DEV(accel_dev), "The configuration doesn't match any SKU"); *arb_map_config = NULL; } } static u32 get_pf2vf_offset(u32 i) { return ADF_C62X_PF2VF_OFFSET(i); } static u32 get_vintmsk_offset(u32 i) { return ADF_C62X_VINTMSK_OFFSET(i); } static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_hw_device_data *hw_device = accel_dev->hw_device; struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR]; void __iomem *csr = misc_bar->virt_addr; unsigned int val, i; /* Enable Accel Engine error detection & correction */ for (i = 0; i < hw_device->get_num_aes(hw_device); i++) { val = ADF_CSR_RD(csr, ADF_C62X_AE_CTX_ENABLES(i)); val |= ADF_C62X_ENABLE_AE_ECC_ERR; ADF_CSR_WR(csr, ADF_C62X_AE_CTX_ENABLES(i), val); val = ADF_CSR_RD(csr, ADF_C62X_AE_MISC_CONTROL(i)); val |= ADF_C62X_ENABLE_AE_ECC_PARITY_CORR; ADF_CSR_WR(csr, ADF_C62X_AE_MISC_CONTROL(i), val); } /* Enable shared memory error detection & correction */ for (i = 0; i < hw_device->get_num_accels(hw_device); i++) { val = ADF_CSR_RD(csr, ADF_C62X_UERRSSMSH(i)); val |= ADF_C62X_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C62X_UERRSSMSH(i), val); val = ADF_CSR_RD(csr, ADF_C62X_CERRSSMSH(i)); val |= ADF_C62X_ERRSSMSH_EN; ADF_CSR_WR(csr, ADF_C62X_CERRSSMSH(i), val); } } static void adf_enable_ints(struct adf_accel_dev *accel_dev) { void __iomem *addr; addr = (&GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR])->virt_addr; /* Enable bundle and misc interrupts */ ADF_CSR_WR(addr, ADF_C62X_SMIAPF0_MASK_OFFSET, ADF_C62X_SMIA0_MASK); ADF_CSR_WR(addr, ADF_C62X_SMIAPF1_MASK_OFFSET, ADF_C62X_SMIA1_MASK); } static int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) { return 0; } void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data) { hw_data->dev_class = &c62x_class; hw_data->instance_id = c62x_class.instances++; hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS; hw_data->num_accel = ADF_C62X_MAX_ACCELERATORS; hw_data->num_logical_accel = 1; hw_data->num_engines = ADF_C62X_MAX_ACCELENGINES; hw_data->tx_rx_gap = ADF_C62X_RX_RINGS_OFFSET; hw_data->tx_rings_mask = ADF_C62X_TX_RINGS_MASK; hw_data->alloc_irq = adf_isr_resource_alloc; hw_data->free_irq = adf_isr_resource_free; hw_data->enable_error_correction = adf_enable_error_correction; hw_data->get_accel_mask = get_accel_mask; hw_data->get_ae_mask = get_ae_mask; hw_data->get_num_accels = get_num_accels; hw_data->get_num_aes = get_num_aes; hw_data->get_sram_bar_id = get_sram_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id; hw_data->get_pf2vf_offset = get_pf2vf_offset; hw_data->get_vintmsk_offset = get_vintmsk_offset; hw_data->get_sku = get_sku; hw_data->fw_name = ADF_C62X_FW; hw_data->fw_mmp_name = ADF_C62X_MMP; hw_data->init_admin_comms = adf_init_admin_comms; hw_data->exit_admin_comms = adf_exit_admin_comms; hw_data->disable_iov = adf_disable_sriov; hw_data->send_admin_init = adf_send_admin_init; hw_data->init_arb = adf_init_arb; hw_data->exit_arb = adf_exit_arb; hw_data->get_arb_mapping = adf_get_arbiter_mapping; hw_data->enable_ints = adf_enable_ints; hw_data->enable_vf2pf_comms = adf_pf_enable_vf2pf_comms; hw_data->reset_device = adf_reset_flr; hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION; } void adf_clean_hw_data_c62x(struct adf_hw_device_data *hw_data) { hw_data->dev_class->instances--; } |