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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 | // SPDX-License-Identifier: GPL-2.0-or-later /* * AHCI SATA platform library * * Copyright 2004-2005 Red Hat, Inc. * Jeff Garzik <jgarzik@pobox.com> * Copyright 2010 MontaVista Software, LLC. * Anton Vorontsov <avorontsov@ru.mvista.com> */ #include <linux/clk.h> #include <linux/kernel.h> #include <linux/gfp.h> #include <linux/module.h> #include <linux/pm.h> #include <linux/interrupt.h> #include <linux/device.h> #include <linux/platform_device.h> #include <linux/libata.h> #include <linux/ahci_platform.h> #include <linux/phy/phy.h> #include <linux/pm_runtime.h> #include <linux/of_platform.h> #include <linux/reset.h> #include "ahci.h" static void ahci_host_stop(struct ata_host *host); struct ata_port_operations ahci_platform_ops = { .inherits = &ahci_ops, .host_stop = ahci_host_stop, }; EXPORT_SYMBOL_GPL(ahci_platform_ops); /** * ahci_platform_enable_phys - Enable PHYs * @hpriv: host private area to store config values * * This function enables all the PHYs found in hpriv->phys, if any. * If a PHY fails to be enabled, it disables all the PHYs already * enabled in reverse order and returns an error. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) { int rc, i; for (i = 0; i < hpriv->nports; i++) { rc = phy_init(hpriv->phys[i]); if (rc) goto disable_phys; rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); if (rc) { phy_exit(hpriv->phys[i]); goto disable_phys; } rc = phy_power_on(hpriv->phys[i]); if (rc && !(rc == -EOPNOTSUPP && (hpriv->flags & AHCI_HFLAG_IGN_NOTSUPP_POWER_ON))) { phy_exit(hpriv->phys[i]); goto disable_phys; } } return 0; disable_phys: while (--i >= 0) { phy_power_off(hpriv->phys[i]); phy_exit(hpriv->phys[i]); } return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_phys); /** * ahci_platform_disable_phys - Disable PHYs * @hpriv: host private area to store config values * * This function disables all PHYs found in hpriv->phys. */ void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) { int i; for (i = 0; i < hpriv->nports; i++) { phy_power_off(hpriv->phys[i]); phy_exit(hpriv->phys[i]); } } EXPORT_SYMBOL_GPL(ahci_platform_disable_phys); /** * ahci_platform_enable_clks - Enable platform clocks * @hpriv: host private area to store config values * * This function enables all the clks found in hpriv->clks, starting at * index 0. If any clk fails to enable it disables all the clks already * enabled in reverse order, and then returns an error. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv) { int c, rc; for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) { rc = clk_prepare_enable(hpriv->clks[c]); if (rc) goto disable_unprepare_clk; } return 0; disable_unprepare_clk: while (--c >= 0) clk_disable_unprepare(hpriv->clks[c]); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_clks); /** * ahci_platform_disable_clks - Disable platform clocks * @hpriv: host private area to store config values * * This function disables all the clks found in hpriv->clks, in reverse * order of ahci_platform_enable_clks (starting at the end of the array). */ void ahci_platform_disable_clks(struct ahci_host_priv *hpriv) { int c; for (c = AHCI_MAX_CLKS - 1; c >= 0; c--) if (hpriv->clks[c]) clk_disable_unprepare(hpriv->clks[c]); } EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); /** * ahci_platform_enable_regulators - Enable regulators * @hpriv: host private area to store config values * * This function enables all the regulators found in controller and * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it * disables all the regulators already enabled in reverse order and * returns an error. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) { int rc, i; rc = regulator_enable(hpriv->ahci_regulator); if (rc) return rc; rc = regulator_enable(hpriv->phy_regulator); if (rc) goto disable_ahci_pwrs; for (i = 0; i < hpriv->nports; i++) { if (!hpriv->target_pwrs[i]) continue; rc = regulator_enable(hpriv->target_pwrs[i]); if (rc) goto disable_target_pwrs; } return 0; disable_target_pwrs: while (--i >= 0) if (hpriv->target_pwrs[i]) regulator_disable(hpriv->target_pwrs[i]); regulator_disable(hpriv->phy_regulator); disable_ahci_pwrs: regulator_disable(hpriv->ahci_regulator); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators); /** * ahci_platform_disable_regulators - Disable regulators * @hpriv: host private area to store config values * * This function disables all regulators found in hpriv->target_pwrs and * AHCI controller. */ void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) { int i; for (i = 0; i < hpriv->nports; i++) { if (!hpriv->target_pwrs[i]) continue; regulator_disable(hpriv->target_pwrs[i]); } regulator_disable(hpriv->ahci_regulator); regulator_disable(hpriv->phy_regulator); } EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); /** * ahci_platform_enable_resources - Enable platform resources * @hpriv: host private area to store config values * * This function enables all ahci_platform managed resources in the * following order: * 1) Regulator * 2) Clocks (through ahci_platform_enable_clks) * 3) Resets * 4) Phys * * If resource enabling fails at any point the previous enabled resources * are disabled in reverse order. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) { int rc; rc = ahci_platform_enable_regulators(hpriv); if (rc) return rc; rc = ahci_platform_enable_clks(hpriv); if (rc) goto disable_regulator; rc = reset_control_deassert(hpriv->rsts); if (rc) goto disable_clks; rc = ahci_platform_enable_phys(hpriv); if (rc) goto disable_resets; return 0; disable_resets: reset_control_assert(hpriv->rsts); disable_clks: ahci_platform_disable_clks(hpriv); disable_regulator: ahci_platform_disable_regulators(hpriv); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); /** * ahci_platform_disable_resources - Disable platform resources * @hpriv: host private area to store config values * * This function disables all ahci_platform managed resources in the * following order: * 1) Phys * 2) Resets * 3) Clocks (through ahci_platform_disable_clks) * 4) Regulator */ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) { ahci_platform_disable_phys(hpriv); reset_control_assert(hpriv->rsts); ahci_platform_disable_clks(hpriv); ahci_platform_disable_regulators(hpriv); } EXPORT_SYMBOL_GPL(ahci_platform_disable_resources); static void ahci_platform_put_resources(struct device *dev, void *res) { struct ahci_host_priv *hpriv = res; int c; if (hpriv->got_runtime_pm) { pm_runtime_put_sync(dev); pm_runtime_disable(dev); } for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) clk_put(hpriv->clks[c]); /* * The regulators are tied to child node device and not to the * SATA device itself. So we can't use devm for automatically * releasing them. We have to do it manually here. */ for (c = 0; c < hpriv->nports; c++) if (hpriv->target_pwrs && hpriv->target_pwrs[c]) regulator_put(hpriv->target_pwrs[c]); kfree(hpriv->target_pwrs); } static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, struct device *dev, struct device_node *node) { int rc; hpriv->phys[port] = devm_of_phy_get(dev, node, NULL); if (!IS_ERR(hpriv->phys[port])) return 0; rc = PTR_ERR(hpriv->phys[port]); switch (rc) { case -ENOSYS: /* No PHY support. Check if PHY is required. */ if (of_find_property(node, "phys", NULL)) { dev_err(dev, "couldn't get PHY in node %pOFn: ENOSYS\n", node); break; } fallthrough; case -ENODEV: /* continue normally */ hpriv->phys[port] = NULL; rc = 0; break; case -EPROBE_DEFER: /* Do not complain yet */ break; default: dev_err(dev, "couldn't get PHY in node %pOFn: %d\n", node, rc); break; } return rc; } static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, struct device *dev) { struct regulator *target_pwr; int rc = 0; target_pwr = regulator_get(dev, "target"); if (!IS_ERR(target_pwr)) hpriv->target_pwrs[port] = target_pwr; else rc = PTR_ERR(target_pwr); return rc; } /** * ahci_platform_get_resources - Get platform resources * @pdev: platform device to get resources for * @flags: bitmap representing the resource to get * * This function allocates an ahci_host_priv struct, and gets the following * resources, storing a reference to them inside the returned struct: * * 1) mmio registers (IORESOURCE_MEM 0, mandatory) * 2) regulator for controlling the targets power (optional) * regulator for controlling the AHCI controller (optional) * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, * or for non devicetree enabled platforms a single clock * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional) * 5) phys (optional) * * RETURNS: * The allocated ahci_host_priv on success, otherwise an ERR_PTR value */ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, unsigned int flags) { struct device *dev = &pdev->dev; struct ahci_host_priv *hpriv; struct clk *clk; struct device_node *child; int i, enabled_ports = 0, rc = -ENOMEM, child_nodes; u32 mask_port_map = 0; if (!devres_open_group(dev, NULL, GFP_KERNEL)) return ERR_PTR(-ENOMEM); hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv), GFP_KERNEL); if (!hpriv) goto err_out; devres_add(dev, hpriv); hpriv->mmio = devm_ioremap_resource(dev, platform_get_resource(pdev, IORESOURCE_MEM, 0)); if (IS_ERR(hpriv->mmio)) { rc = PTR_ERR(hpriv->mmio); goto err_out; } for (i = 0; i < AHCI_MAX_CLKS; i++) { /* * For now we must use clk_get(dev, NULL) for the first clock, * because some platforms (da850, spear13xx) are not yet * converted to use devicetree for clocks. For new platforms * this is equivalent to of_clk_get(dev->of_node, 0). */ if (i == 0) clk = clk_get(dev, NULL); else clk = of_clk_get(dev->of_node, i); if (IS_ERR(clk)) { rc = PTR_ERR(clk); if (rc == -EPROBE_DEFER) goto err_out; break; } hpriv->clks[i] = clk; } hpriv->ahci_regulator = devm_regulator_get(dev, "ahci"); if (IS_ERR(hpriv->ahci_regulator)) { rc = PTR_ERR(hpriv->ahci_regulator); if (rc != 0) goto err_out; } hpriv->phy_regulator = devm_regulator_get(dev, "phy"); if (IS_ERR(hpriv->phy_regulator)) { rc = PTR_ERR(hpriv->phy_regulator); goto err_out; } if (flags & AHCI_PLATFORM_GET_RESETS) { hpriv->rsts = devm_reset_control_array_get_optional_shared(dev); if (IS_ERR(hpriv->rsts)) { rc = PTR_ERR(hpriv->rsts); goto err_out; } } /* * Too many sub-nodes most likely means having something wrong with * the firmware. */ child_nodes = of_get_child_count(dev->of_node); if (child_nodes > AHCI_MAX_PORTS) { rc = -EINVAL; goto err_out; } /* * If no sub-node was found, we still need to set nports to * one in order to be able to use the * ahci_platform_[en|dis]able_[phys|regulators] functions. */ if (child_nodes) hpriv->nports = child_nodes; else hpriv->nports = 1; hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL); if (!hpriv->phys) { rc = -ENOMEM; goto err_out; } /* * We cannot use devm_ here, since ahci_platform_put_resources() uses * target_pwrs after devm_ have freed memory */ hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL); if (!hpriv->target_pwrs) { rc = -ENOMEM; goto err_out; } if (child_nodes) { for_each_child_of_node(dev->of_node, child) { u32 port; struct platform_device *port_dev __maybe_unused; if (!of_device_is_available(child)) continue; if (of_property_read_u32(child, "reg", &port)) { rc = -EINVAL; of_node_put(child); goto err_out; } if (port >= hpriv->nports) { dev_warn(dev, "invalid port number %d\n", port); continue; } mask_port_map |= BIT(port); #ifdef CONFIG_OF_ADDRESS of_platform_device_create(child, NULL, NULL); port_dev = of_find_device_by_node(child); if (port_dev) { rc = ahci_platform_get_regulator(hpriv, port, &port_dev->dev); if (rc == -EPROBE_DEFER) { of_node_put(child); goto err_out; } } #endif rc = ahci_platform_get_phy(hpriv, port, dev, child); if (rc) { of_node_put(child); goto err_out; } enabled_ports++; } if (!enabled_ports) { dev_warn(dev, "No port enabled\n"); rc = -ENODEV; goto err_out; } if (!hpriv->mask_port_map) hpriv->mask_port_map = mask_port_map; } else { /* * If no sub-node was found, keep this for device tree * compatibility */ rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node); if (rc) goto err_out; rc = ahci_platform_get_regulator(hpriv, 0, dev); if (rc == -EPROBE_DEFER) goto err_out; } pm_runtime_enable(dev); pm_runtime_get_sync(dev); hpriv->got_runtime_pm = true; devres_remove_group(dev, NULL); return hpriv; err_out: devres_release_group(dev, NULL); return ERR_PTR(rc); } EXPORT_SYMBOL_GPL(ahci_platform_get_resources); /** * ahci_platform_init_host - Bring up an ahci-platform host * @pdev: platform device pointer for the host * @hpriv: ahci-host private data for the host * @pi_template: template for the ata_port_info to use * @sht: scsi_host_template to use when registering * * This function does all the usual steps needed to bring up an * ahci-platform host, note any necessary resources (ie clks, phys, etc.) * must be initialized / enabled before calling this. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_init_host(struct platform_device *pdev, struct ahci_host_priv *hpriv, const struct ata_port_info *pi_template, struct scsi_host_template *sht) { struct device *dev = &pdev->dev; struct ata_port_info pi = *pi_template; const struct ata_port_info *ppi[] = { &pi, NULL }; struct ata_host *host; int i, irq, n_ports, rc; irq = platform_get_irq(pdev, 0); if (irq < 0) { if (irq != -EPROBE_DEFER) dev_err(dev, "no irq\n"); return irq; } if (!irq) return -EINVAL; hpriv->irq = irq; /* prepare host */ pi.private_data = (void *)(unsigned long)hpriv->flags; ahci_save_initial_config(dev, hpriv); if (hpriv->cap & HOST_CAP_NCQ) pi.flags |= ATA_FLAG_NCQ; if (hpriv->cap & HOST_CAP_PMP) pi.flags |= ATA_FLAG_PMP; ahci_set_em_messages(hpriv, &pi); /* CAP.NP sometimes indicate the index of the last enabled * port, at other times, that of the last possible port, so * determining the maximum port number requires looking at * both CAP.NP and port_map. */ n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); host = ata_host_alloc_pinfo(dev, ppi, n_ports); if (!host) return -ENOMEM; host->private_data = hpriv; if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) host->flags |= ATA_HOST_PARALLEL_SCAN; else dev_info(dev, "SSS flag set, parallel bus scan disabled\n"); if (pi.flags & ATA_FLAG_EM) ahci_reset_em(host); for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; ata_port_desc(ap, "mmio %pR", platform_get_resource(pdev, IORESOURCE_MEM, 0)); ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80); /* set enclosure management message type */ if (ap->flags & ATA_FLAG_EM) ap->em_message_type = hpriv->em_msg_type; /* disabled/not-implemented port */ if (!(hpriv->port_map & (1 << i))) ap->ops = &ata_dummy_port_ops; } if (hpriv->cap & HOST_CAP_64) { rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); if (rc) { rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); if (rc) { dev_err(dev, "Failed to enable 64-bit DMA.\n"); return rc; } dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n"); } } rc = ahci_reset_controller(host); if (rc) return rc; ahci_init_controller(host); ahci_print_info(host, "platform"); return ahci_host_activate(host, sht); } EXPORT_SYMBOL_GPL(ahci_platform_init_host); static void ahci_host_stop(struct ata_host *host) { struct ahci_host_priv *hpriv = host->private_data; ahci_platform_disable_resources(hpriv); } /** * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports * @pdev: platform device pointer for the host * * This function is called during system shutdown and performs the minimal * deconfiguration required to ensure that an ahci_platform host cannot * corrupt or otherwise interfere with a new kernel being started with kexec. */ void ahci_platform_shutdown(struct platform_device *pdev) { struct ata_host *host = platform_get_drvdata(pdev); struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = hpriv->mmio; int i; for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; /* Disable port interrupts */ if (ap->ops->freeze) ap->ops->freeze(ap); /* Stop the port DMA engines */ if (ap->ops->port_stop) ap->ops->port_stop(ap); } /* Disable and clear host interrupts */ writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL); readl(mmio + HOST_CTL); /* flush */ writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT); } EXPORT_SYMBOL_GPL(ahci_platform_shutdown); #ifdef CONFIG_PM_SLEEP /** * ahci_platform_suspend_host - Suspend an ahci-platform host * @dev: device pointer for the host * * This function does all the usual steps needed to suspend an * ahci-platform host, note any necessary resources (ie clks, phys, etc.) * must be disabled after calling this. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_suspend_host(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = hpriv->mmio; u32 ctl; if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { dev_err(dev, "firmware update required for suspend/resume\n"); return -EIO; } /* * AHCI spec rev1.1 section 8.3.3: * Software must disable interrupts prior to requesting a * transition of the HBA to D3 state. */ ctl = readl(mmio + HOST_CTL); ctl &= ~HOST_IRQ_EN; writel(ctl, mmio + HOST_CTL); readl(mmio + HOST_CTL); /* flush */ if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) ahci_platform_disable_phys(hpriv); return ata_host_suspend(host, PMSG_SUSPEND); } EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); /** * ahci_platform_resume_host - Resume an ahci-platform host * @dev: device pointer for the host * * This function does all the usual steps needed to resume an ahci-platform * host, note any necessary resources (ie clks, phys, etc.) must be * initialized / enabled before calling this. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_resume_host(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); struct ahci_host_priv *hpriv = host->private_data; int rc; if (dev->power.power_state.event == PM_EVENT_SUSPEND) { rc = ahci_reset_controller(host); if (rc) return rc; ahci_init_controller(host); } if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) ahci_platform_enable_phys(hpriv); ata_host_resume(host); return 0; } EXPORT_SYMBOL_GPL(ahci_platform_resume_host); /** * ahci_platform_suspend - Suspend an ahci-platform device * @dev: the platform device to suspend * * This function suspends the host associated with the device, followed by * disabling all the resources of the device. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_suspend(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); struct ahci_host_priv *hpriv = host->private_data; int rc; rc = ahci_platform_suspend_host(dev); if (rc) return rc; ahci_platform_disable_resources(hpriv); return 0; } EXPORT_SYMBOL_GPL(ahci_platform_suspend); /** * ahci_platform_resume - Resume an ahci-platform device * @dev: the platform device to resume * * This function enables all the resources of the device followed by * resuming the host associated with the device. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_resume(struct device *dev) { struct ata_host *host = dev_get_drvdata(dev); struct ahci_host_priv *hpriv = host->private_data; int rc; rc = ahci_platform_enable_resources(hpriv); if (rc) return rc; rc = ahci_platform_resume_host(dev); if (rc) goto disable_resources; /* We resumed so update PM runtime state */ pm_runtime_disable(dev); pm_runtime_set_active(dev); pm_runtime_enable(dev); return 0; disable_resources: ahci_platform_disable_resources(hpriv); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_resume); #endif MODULE_DESCRIPTION("AHCI SATA platform library"); MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); MODULE_LICENSE("GPL"); |