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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 | // SPDX-License-Identifier: GPL-2.0 /* * NAND Flash Controller Device Driver * Copyright © 2009-2010, Intel Corporation and its suppliers. */ #include <linux/errno.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include "denali.h" #define DENALI_NAND_NAME "denali-nand-pci" #define INTEL_CE4100 1 #define INTEL_MRST 2 /* List of platforms this NAND controller has be integrated into */ static const struct pci_device_id denali_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x0701), INTEL_CE4100 }, { PCI_VDEVICE(INTEL, 0x0809), INTEL_MRST }, { /* end: all zeroes */ } }; MODULE_DEVICE_TABLE(pci, denali_pci_ids); NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15); static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { int ret; resource_size_t csr_base, mem_base; unsigned long csr_len, mem_len; struct denali_nand_info *denali; denali = devm_kzalloc(&dev->dev, sizeof(*denali), GFP_KERNEL); if (!denali) return -ENOMEM; ret = pcim_enable_device(dev); if (ret) { dev_err(&dev->dev, "Spectra: pci_enable_device failed.\n"); return ret; } if (id->driver_data == INTEL_CE4100) { mem_base = pci_resource_start(dev, 0); mem_len = pci_resource_len(dev, 1); csr_base = pci_resource_start(dev, 1); csr_len = pci_resource_len(dev, 1); } else { csr_base = pci_resource_start(dev, 0); csr_len = pci_resource_len(dev, 0); mem_base = pci_resource_start(dev, 1); mem_len = pci_resource_len(dev, 1); if (!mem_len) { mem_base = csr_base + csr_len; mem_len = csr_len; } } pci_set_master(dev); denali->dev = &dev->dev; denali->irq = dev->irq; denali->ecc_caps = &denali_pci_ecc_caps; denali->nand.ecc.options |= NAND_ECC_MAXIMIZE; denali->clk_rate = 50000000; /* 50 MHz */ denali->clk_x_rate = 200000000; /* 200 MHz */ ret = pci_request_regions(dev, DENALI_NAND_NAME); if (ret) { dev_err(&dev->dev, "Spectra: Unable to request memory regions\n"); return ret; } denali->reg = ioremap_nocache(csr_base, csr_len); if (!denali->reg) { dev_err(&dev->dev, "Spectra: Unable to remap memory region\n"); return -ENOMEM; } denali->host = ioremap_nocache(mem_base, mem_len); if (!denali->host) { dev_err(&dev->dev, "Spectra: ioremap_nocache failed!"); ret = -ENOMEM; goto failed_remap_reg; } ret = denali_init(denali); if (ret) goto failed_remap_mem; pci_set_drvdata(dev, denali); return 0; failed_remap_mem: iounmap(denali->host); failed_remap_reg: iounmap(denali->reg); return ret; } static void denali_pci_remove(struct pci_dev *dev) { struct denali_nand_info *denali = pci_get_drvdata(dev); denali_remove(denali); iounmap(denali->reg); iounmap(denali->host); } static struct pci_driver denali_pci_driver = { .name = DENALI_NAND_NAME, .id_table = denali_pci_ids, .probe = denali_pci_probe, .remove = denali_pci_remove, }; module_pci_driver(denali_pci_driver); MODULE_DESCRIPTION("PCI driver for Denali NAND controller"); MODULE_AUTHOR("Intel Corporation and its suppliers"); MODULE_LICENSE("GPL v2"); |