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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 | /* * arch/arm/boot/dts/axm55xx.dtsi * * Copyright (C) 2013 LSI * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/lsi,axm5516-clks.h> #include "skeleton64.dtsi" / { interrupt-parent = <&gic>; aliases { serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; timer = &timer0; }; clocks { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; clk_ref0: clk_ref0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; clk_ref1: clk_ref1 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; clk_ref2: clk_ref2 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; clks: clock-controller@2010020000 { compatible = "lsi,axm5516-clks"; #clock-cells = <1>; reg = <0x20 0x10020000 0 0x20000>; }; }; gic: interrupt-controller@2001001000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x20 0x01001000 0 0x1000>, <0x20 0x01002000 0 0x1000>, <0x20 0x01004000 0 0x2000>, <0x20 0x01006000 0 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; timer { compatible = "arm,armv7-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; pmu { compatible = "arm,cortex-a15-pmu"; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; }; soc { compatible = "simple-bus"; device_type = "soc"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&gic>; ranges; syscon: syscon@2010030000 { compatible = "lsi,axxia-syscon", "syscon"; reg = <0x20 0x10030000 0 0x2000>; }; reset: reset@2010031000 { compatible = "lsi,axm55xx-reset"; syscon = <&syscon>; }; amba { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; serial0: uart@2010080000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10080000 0 0x1000>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; serial1: uart@2010081000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10081000 0 0x1000>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; serial2: uart@2010082000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10082000 0 0x1000>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; serial3: uart@2010083000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10083000 0 0x1000>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; timer0: timer@2010091000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x20 0x10091000 0 0x1000>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "okay"; }; gpio0: gpio@2010092000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0x20 0x10092000 0x00 0x1000>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; gpio1: gpio@2010093000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0x20 0x10093000 0x00 0x1000>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks AXXIA_CLK_PER>; clock-names = "apb_pclk"; status = "disabled"; }; }; }; }; /* Local Variables: mode: C End: */ |