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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 | /* moxart.dtsi - Device Tree Include file for MOXA ART family SoC * * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com> * * Licensed under GPLv2 or later. */ /include/ "skeleton.dtsi" / { compatible = "moxa,moxart"; model = "MOXART"; interrupt-parent = <&intc>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "faraday,fa526"; reg = <0>; }; }; clocks { #address-cells = <1>; #size-cells = <0>; }; soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x90000000 0x10000000>; ranges; intc: interrupt-controller@98800000 { compatible = "moxa,moxart-ic"; reg = <0x98800000 0x38>; interrupt-controller; #interrupt-cells = <2>; interrupt-mask = <0x00080000>; }; clk_pll: clk_pll@98100000 { compatible = "moxa,moxart-pll-clock"; #clock-cells = <0>; reg = <0x98100000 0x34>; }; clk_apb: clk_apb@98100000 { compatible = "moxa,moxart-apb-clock"; #clock-cells = <0>; reg = <0x98100000 0x34>; clocks = <&clk_pll>; }; timer: timer@98400000 { compatible = "moxa,moxart-timer"; reg = <0x98400000 0x42>; interrupts = <19 1>; clocks = <&clk_apb>; }; gpio: gpio@98700000 { gpio-controller; #gpio-cells = <2>; compatible = "moxa,moxart-gpio"; reg = <0x98700000 0xC>; }; rtc: rtc { compatible = "moxa,moxart-rtc"; gpio-rtc-sclk = <&gpio 5 0>; gpio-rtc-data = <&gpio 6 0>; gpio-rtc-reset = <&gpio 7 0>; }; dma: dma@90500000 { compatible = "moxa,moxart-dma"; reg = <0x90500080 0x40>; interrupts = <24 0>; #dma-cells = <1>; }; watchdog: watchdog@98500000 { compatible = "moxa,moxart-watchdog"; reg = <0x98500000 0x10>; clocks = <&clk_apb>; }; sdhci: sdhci@98e00000 { compatible = "moxa,moxart-sdhci"; reg = <0x98e00000 0x5C>; interrupts = <5 0>; clocks = <&clk_apb>; dmas = <&dma 5>, <&dma 5>; dma-names = "tx", "rx"; status = "disabled"; }; mdio0: mdio@90900090 { compatible = "moxa,moxart-mdio"; reg = <0x90900090 0x8>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; mdio1: mdio@92000090 { compatible = "moxa,moxart-mdio"; reg = <0x92000090 0x8>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; mac0: mac@90900000 { compatible = "moxa,moxart-mac"; reg = <0x90900000 0x90>; interrupts = <25 0>; phy-handle = <ðphy0>; phy-mode = "mii"; status = "disabled"; }; mac1: mac@92000000 { compatible = "moxa,moxart-mac"; reg = <0x92000000 0x90>; interrupts = <27 0>; phy-handle = <ðphy1>; phy-mode = "mii"; status = "disabled"; }; uart0: uart@98200000 { compatible = "ns16550a"; reg = <0x98200000 0x20>; interrupts = <31 8>; reg-shift = <2>; reg-io-width = <4>; clock-frequency = <14745600>; status = "disabled"; }; }; }; |