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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 | /* * Marvell RD88F6192 Board descrition * * Andrew Lunn <andrew@lunn.ch> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. * * This file contains the definitions that are common between the three * variants of the Marvell Kirkwood Development Board. */ /dts-v1/; #include "kirkwood.dtsi" #include "kirkwood-6192.dtsi" / { model = "Marvell RD88F6192 reference design"; compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood"; memory { device_type = "memory"; reg = <0x00000000 0x20000000>; }; chosen { bootargs = "console=ttyS0,115200n8"; stdout-path = &uart0; }; mbus { pcie-controller { status = "okay"; pcie@1,0 { status = "okay"; }; }; }; ocp@f1000000 { pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_usb_power>; pinctrl-names = "default"; pmx_usb_power: pmx-usb-power { marvell,pins = "mpp10"; marvell,function = "gpo"; }; }; serial@12000 { status = "okay"; }; spi@10600 { status = "okay"; m25p128@0 { #address-cells = <1>; #size-cells = <1>; compatible = "st,m25p128", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <20000000>; mode = <0>; }; }; sata@80000 { status = "okay"; nr-ports = <2>; }; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&pmx_usb_power>; pinctrl-names = "default"; usb_power: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "USB VBUS"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; regulator-always-on; regulator-boot-on; gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>; }; }; }; &mdio { status = "okay"; ethphy0: ethernet-phy@8 { reg = <8>; }; }; ð0 { status = "okay"; ethernet0-port@0 { phy-handle = <ðphy0>; }; }; |