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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 | /* * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __MSM_GEM_H__ #define __MSM_GEM_H__ #include <linux/reservation.h> #include "msm_drv.h" /* Additional internal-use only BO flags: */ #define MSM_BO_STOLEN 0x10000000 /* try to use stolen/splash memory */ struct msm_gem_object { struct drm_gem_object base; uint32_t flags; /* And object is either: * inactive - on priv->inactive_list * active - on one one of the gpu's active_list.. well, at * least for now we don't have (I don't think) hw sync between * 2d and 3d one devices which have both, meaning we need to * block on submit if a bo is already on other ring * */ struct list_head mm_list; struct msm_gpu *gpu; /* non-null if active */ uint32_t read_fence, write_fence; /* Transiently in the process of submit ioctl, objects associated * with the submit are on submit->bo_list.. this only lasts for * the duration of the ioctl, so one bo can never be on multiple * submit lists. */ struct list_head submit_entry; struct page **pages; struct sg_table *sgt; void *vaddr; struct { // XXX uint32_t iova; } domain[NUM_DOMAINS]; /* normally (resv == &_resv) except for imported bo's */ struct reservation_object *resv; struct reservation_object _resv; /* For physically contiguous buffers. Used when we don't have * an IOMMU. Also used for stolen/splashscreen buffer. */ struct drm_mm_node *vram_node; }; #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) static inline bool is_active(struct msm_gem_object *msm_obj) { return msm_obj->gpu != NULL; } static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj, uint32_t op) { uint32_t fence = 0; if (op & MSM_PREP_READ) fence = msm_obj->write_fence; if (op & MSM_PREP_WRITE) fence = max(fence, msm_obj->read_fence); return fence; } #define MAX_CMDS 4 /* Created per submit-ioctl, to track bo's and cmdstream bufs, etc, * associated with the cmdstream submission for synchronization (and * make it easier to unwind when things go wrong, etc). This only * lasts for the duration of the submit-ioctl. */ struct msm_gem_submit { struct drm_device *dev; struct msm_gpu *gpu; struct list_head node; /* node in gpu submit_list */ struct list_head bo_list; struct ww_acquire_ctx ticket; uint32_t fence; bool valid; unsigned int nr_cmds; unsigned int nr_bos; struct { uint32_t type; uint32_t size; /* in dwords */ uint32_t iova; uint32_t idx; /* cmdstream buffer idx in bos[] */ } cmd[MAX_CMDS]; struct { uint32_t flags; struct msm_gem_object *obj; uint32_t iova; } bos[0]; }; #endif /* __MSM_GEM_H__ */ |