Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 | /* * Device Tree Source for IOMEGA StorCenter * * Copyright 2007 Oyvind Repvik * Copyright 2007 Jon Loeliger * * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ /dts-v1/; / { model = "StorCenter"; compatible = "iomega,storcenter"; #address-cells = <1>; #size-cells = <1>; aliases { serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; }; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8241@0 { device_type = "cpu"; reg = <0>; clock-frequency = <200000000>; timebase-frequency = <25000000>; bus-frequency = <0>; /* from bootwrapper */ i-cache-line-size = <32>; d-cache-line-size = <32>; i-cache-size = <16384>; d-cache-size = <16384>; }; }; memory { device_type = "memory"; reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */ }; soc@fc000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "fsl,mpc8241", "mpc10x"; store-gathering = <0>; /* 0 == off, !0 == on */ ranges = <0x0 0xfc000000 0x100000>; reg = <0xfc000000 0x100000>; /* EUMB */ bus-frequency = <0>; /* fixed by loader */ i2c@3000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl-i2c"; reg = <0x3000 0x100>; interrupts = <17 2>; interrupt-parent = <&mpic>; rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; }; }; serial0: serial@4500 { cell-index = <0>; device_type = "serial"; compatible = "fsl,ns16550", "ns16550"; reg = <0x4500 0x20>; clock-frequency = <97553800>; /* Hz */ current-speed = <115200>; interrupts = <25 2>; interrupt-parent = <&mpic>; }; serial1: serial@4600 { cell-index = <1>; device_type = "serial"; compatible = "fsl,ns16550", "ns16550"; reg = <0x4600 0x20>; clock-frequency = <97553800>; /* Hz */ current-speed = <9600>; interrupts = <26 2>; interrupt-parent = <&mpic>; }; mpic: interrupt-controller@40000 { #interrupt-cells = <2>; #address-cells = <0>; device_type = "open-pic"; compatible = "chrp,open-pic"; interrupt-controller; reg = <0x40000 0x40000>; }; }; pci0: pci@fe800000 { #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; device_type = "pci"; compatible = "mpc10x-pci"; reg = <0xfe800000 0x1000>; ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; bus-range = <0 0xff>; clock-frequency = <97553800>; interrupt-parent = <&mpic>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 13 - IDE */ 0x6800 0 0 1 &mpic 0 1 0x6800 0 0 2 &mpic 0 1 0x6800 0 0 3 &mpic 0 1 0x6800 0 0 4 &mpic 0 1 /* IDSEL 14 - USB */ 0x7000 0 0 1 &mpic 0 1 0x7000 0 0 2 &mpic 0 1 0x7000 0 0 3 &mpic 0 1 0x7000 0 0 4 &mpic 0 1 /* IDSEL 15 - ETH */ 0x7800 0 0 1 &mpic 0 1 0x7800 0 0 2 &mpic 0 1 0x7800 0 0 3 &mpic 0 1 0x7800 0 0 4 &mpic 0 1 >; }; chosen { stdout-path = &serial0; }; }; |