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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 | /* * Intel SOC Punit device state debug driver * Punit controls power management for North Complex devices (Graphics * blocks, Image Signal Processing, video processing, display, DSP etc.) * * Copyright (c) 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * */ #include <linux/module.h> #include <linux/init.h> #include <linux/device.h> #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/io.h> #include <asm/cpu_device_id.h> #include <asm/intel-family.h> #include <asm/iosf_mbi.h> /* Subsystem config/status Video processor */ #define VED_SS_PM0 0x32 /* Subsystem config/status ISP (Image Signal Processor) */ #define ISP_SS_PM0 0x39 /* Subsystem config/status Input/output controller */ #define MIO_SS_PM 0x3B /* Shift bits for getting status for video, isp and i/o */ #define SSS_SHIFT 24 /* Power gate status reg */ #define PWRGT_STATUS 0x61 /* Shift bits for getting status for graphics rendering */ #define RENDER_POS 0 /* Shift bits for getting status for media control */ #define MEDIA_POS 2 /* Shift bits for getting status for Valley View/Baytrail display */ #define VLV_DISPLAY_POS 6 /* Subsystem config/status display for Cherry Trail SOC */ #define CHT_DSP_SSS 0x36 /* Shift bits for getting status for display */ #define CHT_DSP_SSS_POS 16 struct punit_device { char *name; int reg; int sss_pos; }; static const struct punit_device punit_device_tng[] = { { "DISPLAY", CHT_DSP_SSS, SSS_SHIFT }, { "VED", VED_SS_PM0, SSS_SHIFT }, { "ISP", ISP_SS_PM0, SSS_SHIFT }, { "MIO", MIO_SS_PM, SSS_SHIFT }, { NULL } }; static const struct punit_device punit_device_byt[] = { { "GFX RENDER", PWRGT_STATUS, RENDER_POS }, { "GFX MEDIA", PWRGT_STATUS, MEDIA_POS }, { "DISPLAY", PWRGT_STATUS, VLV_DISPLAY_POS }, { "VED", VED_SS_PM0, SSS_SHIFT }, { "ISP", ISP_SS_PM0, SSS_SHIFT }, { "MIO", MIO_SS_PM, SSS_SHIFT }, { NULL } }; static const struct punit_device punit_device_cht[] = { { "GFX RENDER", PWRGT_STATUS, RENDER_POS }, { "GFX MEDIA", PWRGT_STATUS, MEDIA_POS }, { "DISPLAY", CHT_DSP_SSS, CHT_DSP_SSS_POS }, { "VED", VED_SS_PM0, SSS_SHIFT }, { "ISP", ISP_SS_PM0, SSS_SHIFT }, { "MIO", MIO_SS_PM, SSS_SHIFT }, { NULL } }; static const char * const dstates[] = {"D0", "D0i1", "D0i2", "D0i3"}; static int punit_dev_state_show(struct seq_file *seq_file, void *unused) { u32 punit_pwr_status; struct punit_device *punit_devp = seq_file->private; int index; int status; seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n"); while (punit_devp->name) { status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, punit_devp->reg, &punit_pwr_status); if (status) { seq_printf(seq_file, "%9s : Read Failed\n", punit_devp->name); } else { index = (punit_pwr_status >> punit_devp->sss_pos) & 3; seq_printf(seq_file, "%9s : %s\n", punit_devp->name, dstates[index]); } punit_devp++; } return 0; } static int punit_dev_state_open(struct inode *inode, struct file *file) { return single_open(file, punit_dev_state_show, inode->i_private); } static const struct file_operations punit_dev_state_ops = { .open = punit_dev_state_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, }; static struct dentry *punit_dbg_file; static int punit_dbgfs_register(struct punit_device *punit_device) { static struct dentry *dev_state; punit_dbg_file = debugfs_create_dir("punit_atom", NULL); if (!punit_dbg_file) return -ENXIO; dev_state = debugfs_create_file("dev_power_state", S_IFREG | S_IRUGO, punit_dbg_file, punit_device, &punit_dev_state_ops); if (!dev_state) { pr_err("punit_dev_state register failed\n"); debugfs_remove(punit_dbg_file); return -ENXIO; } return 0; } static void punit_dbgfs_unregister(void) { debugfs_remove_recursive(punit_dbg_file); } #define ICPU(model, drv_data) \ { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT,\ (kernel_ulong_t)&drv_data } static const struct x86_cpu_id intel_punit_cpu_ids[] = { ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt), ICPU(INTEL_FAM6_ATOM_MERRIFIELD, punit_device_tng), ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids); static int __init punit_atom_debug_init(void) { const struct x86_cpu_id *id; int ret; id = x86_match_cpu(intel_punit_cpu_ids); if (!id) return -ENODEV; ret = punit_dbgfs_register((struct punit_device *)id->driver_data); if (ret < 0) return ret; return 0; } static void __exit punit_atom_debug_exit(void) { punit_dbgfs_unregister(); } module_init(punit_atom_debug_init); module_exit(punit_atom_debug_exit); MODULE_AUTHOR("Kumar P, Mahesh <mahesh.kumar.p@intel.com>"); MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); MODULE_DESCRIPTION("Driver for Punit devices states debugging"); MODULE_LICENSE("GPL v2"); |