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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 | /***********************license start*************** * Author: Cavium Networks * * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * * Copyright (c) 2003-2008 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as * published by the Free Software Foundation. * * This file is distributed in the hope that it will be useful, but * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or * NONINFRINGEMENT. See the GNU General Public License for more * details. * * You should have received a copy of the GNU General Public License * along with this file; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * or visit http://www.gnu.org/licenses/. * * This file may also be available under a different license from Cavium. * Contact Cavium Networks for more information ***********************license end**************************************/ /* * Small helper utilities. */ #include <linux/kernel.h> #include <asm/octeon/octeon.h> #include <asm/octeon/cvmx-config.h> #include <asm/octeon/cvmx-fpa.h> #include <asm/octeon/cvmx-pip.h> #include <asm/octeon/cvmx-pko.h> #include <asm/octeon/cvmx-ipd.h> #include <asm/octeon/cvmx-spi.h> #include <asm/octeon/cvmx-helper.h> #include <asm/octeon/cvmx-helper-util.h> #include <asm/octeon/cvmx-ipd-defs.h> /** * Convert a interface mode into a human readable string * * @mode: Mode to convert * * Returns String */ const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode) { switch (mode) { case CVMX_HELPER_INTERFACE_MODE_DISABLED: return "DISABLED"; case CVMX_HELPER_INTERFACE_MODE_RGMII: return "RGMII"; case CVMX_HELPER_INTERFACE_MODE_GMII: return "GMII"; case CVMX_HELPER_INTERFACE_MODE_SPI: return "SPI"; case CVMX_HELPER_INTERFACE_MODE_PCIE: return "PCIE"; case CVMX_HELPER_INTERFACE_MODE_XAUI: return "XAUI"; case CVMX_HELPER_INTERFACE_MODE_SGMII: return "SGMII"; case CVMX_HELPER_INTERFACE_MODE_PICMG: return "PICMG"; case CVMX_HELPER_INTERFACE_MODE_NPI: return "NPI"; case CVMX_HELPER_INTERFACE_MODE_LOOP: return "LOOP"; } return "UNKNOWN"; } /** * Debug routine to dump the packet structure to the console * * @work: Work queue entry containing the packet to dump * Returns */ int cvmx_helper_dump_packet(cvmx_wqe_t *work) { uint64_t count; uint64_t remaining_bytes; union cvmx_buf_ptr buffer_ptr; uint64_t start_of_buffer; uint8_t *data_address; uint8_t *end_of_data; cvmx_dprintf("Packet Length: %u\n", work->word1.len); cvmx_dprintf(" Input Port: %u\n", cvmx_wqe_get_port(work)); cvmx_dprintf(" QoS: %u\n", cvmx_wqe_get_qos(work)); cvmx_dprintf(" Buffers: %u\n", work->word2.s.bufs); if (work->word2.s.bufs == 0) { union cvmx_ipd_wqe_fpa_queue wqe_pool; wqe_pool.u64 = cvmx_read_csr(CVMX_IPD_WQE_FPA_QUEUE); buffer_ptr.u64 = 0; buffer_ptr.s.pool = wqe_pool.s.wqe_pool; buffer_ptr.s.size = 128; buffer_ptr.s.addr = cvmx_ptr_to_phys(work->packet_data); if (likely(!work->word2.s.not_IP)) { union cvmx_pip_ip_offset pip_ip_offset; pip_ip_offset.u64 = cvmx_read_csr(CVMX_PIP_IP_OFFSET); buffer_ptr.s.addr += (pip_ip_offset.s.offset << 3) - work->word2.s.ip_offset; buffer_ptr.s.addr += (work->word2.s.is_v6 ^ 1) << 2; } else { /* * WARNING: This code assumes that the packet * is not RAW. If it was, we would use * PIP_GBL_CFG[RAW_SHF] instead of * PIP_GBL_CFG[NIP_SHF]. */ union cvmx_pip_gbl_cfg pip_gbl_cfg; pip_gbl_cfg.u64 = cvmx_read_csr(CVMX_PIP_GBL_CFG); buffer_ptr.s.addr += pip_gbl_cfg.s.nip_shf; } } else buffer_ptr = work->packet_ptr; remaining_bytes = work->word1.len; while (remaining_bytes) { start_of_buffer = ((buffer_ptr.s.addr >> 7) - buffer_ptr.s.back) << 7; cvmx_dprintf(" Buffer Start:%llx\n", (unsigned long long)start_of_buffer); cvmx_dprintf(" Buffer I : %u\n", buffer_ptr.s.i); cvmx_dprintf(" Buffer Back: %u\n", buffer_ptr.s.back); cvmx_dprintf(" Buffer Pool: %u\n", buffer_ptr.s.pool); cvmx_dprintf(" Buffer Data: %llx\n", (unsigned long long)buffer_ptr.s.addr); cvmx_dprintf(" Buffer Size: %u\n", buffer_ptr.s.size); cvmx_dprintf("\t\t"); data_address = (uint8_t *) cvmx_phys_to_ptr(buffer_ptr.s.addr); end_of_data = data_address + buffer_ptr.s.size; count = 0; while (data_address < end_of_data) { if (remaining_bytes == 0) break; else remaining_bytes--; cvmx_dprintf("%02x", (unsigned int)*data_address); data_address++; if (remaining_bytes && (count == 7)) { cvmx_dprintf("\n\t\t"); count = 0; } else count++; } cvmx_dprintf("\n"); if (remaining_bytes) buffer_ptr = *(union cvmx_buf_ptr *) cvmx_phys_to_ptr(buffer_ptr.s.addr - 8); } return 0; } /** * Setup Random Early Drop on a specific input queue * * @queue: Input queue to setup RED on (0-7) * @pass_thresh: * Packets will begin slowly dropping when there are less than * this many packet buffers free in FPA 0. * @drop_thresh: * All incoming packets will be dropped when there are less * than this many free packet buffers in FPA 0. * Returns Zero on success. Negative on failure */ int cvmx_helper_setup_red_queue(int queue, int pass_thresh, int drop_thresh) { union cvmx_ipd_qosx_red_marks red_marks; union cvmx_ipd_red_quex_param red_param; /* Set RED to begin dropping packets when there are pass_thresh buffers left. It will linearly drop more packets until reaching drop_thresh buffers */ red_marks.u64 = 0; red_marks.s.drop = drop_thresh; red_marks.s.pass = pass_thresh; cvmx_write_csr(CVMX_IPD_QOSX_RED_MARKS(queue), red_marks.u64); /* Use the actual queue 0 counter, not the average */ red_param.u64 = 0; red_param.s.prb_con = (255ul << 24) / (red_marks.s.pass - red_marks.s.drop); red_param.s.avg_con = 1; red_param.s.new_con = 255; red_param.s.use_pcnt = 1; cvmx_write_csr(CVMX_IPD_RED_QUEX_PARAM(queue), red_param.u64); return 0; } /** * Setup Random Early Drop to automatically begin dropping packets. * * @pass_thresh: * Packets will begin slowly dropping when there are less than * this many packet buffers free in FPA 0. * @drop_thresh: * All incoming packets will be dropped when there are less * than this many free packet buffers in FPA 0. * Returns Zero on success. Negative on failure */ int cvmx_helper_setup_red(int pass_thresh, int drop_thresh) { union cvmx_ipd_portx_bp_page_cnt page_cnt; union cvmx_ipd_bp_prt_red_end ipd_bp_prt_red_end; union cvmx_ipd_red_port_enable red_port_enable; int queue; int interface; int port; /* Disable backpressure based on queued buffers. It needs SW support */ page_cnt.u64 = 0; page_cnt.s.bp_enb = 0; page_cnt.s.page_cnt = 100; for (interface = 0; interface < 2; interface++) { for (port = cvmx_helper_get_first_ipd_port(interface); port < cvmx_helper_get_last_ipd_port(interface); port++) cvmx_write_csr(CVMX_IPD_PORTX_BP_PAGE_CNT(port), page_cnt.u64); } for (queue = 0; queue < 8; queue++) cvmx_helper_setup_red_queue(queue, pass_thresh, drop_thresh); /* Shutoff the dropping based on the per port page count. SW isn't decrementing it right now */ ipd_bp_prt_red_end.u64 = 0; ipd_bp_prt_red_end.s.prt_enb = 0; cvmx_write_csr(CVMX_IPD_BP_PRT_RED_END, ipd_bp_prt_red_end.u64); red_port_enable.u64 = 0; red_port_enable.s.prt_enb = 0xfffffffffull; red_port_enable.s.avg_dly = 10000; red_port_enable.s.prb_dly = 10000; cvmx_write_csr(CVMX_IPD_RED_PORT_ENABLE, red_port_enable.u64); return 0; } EXPORT_SYMBOL_GPL(cvmx_helper_setup_red); /** * Setup the common GMX settings that determine the number of * ports. These setting apply to almost all configurations of all * chips. * * @interface: Interface to configure * @num_ports: Number of ports on the interface * * Returns Zero on success, negative on failure */ int __cvmx_helper_setup_gmx(int interface, int num_ports) { union cvmx_gmxx_tx_prts gmx_tx_prts; union cvmx_gmxx_rx_prts gmx_rx_prts; union cvmx_pko_reg_gmx_port_mode pko_mode; union cvmx_gmxx_txx_thresh gmx_tx_thresh; int index; /* Tell GMX the number of TX ports on this interface */ gmx_tx_prts.u64 = cvmx_read_csr(CVMX_GMXX_TX_PRTS(interface)); gmx_tx_prts.s.prts = num_ports; cvmx_write_csr(CVMX_GMXX_TX_PRTS(interface), gmx_tx_prts.u64); /* Tell GMX the number of RX ports on this interface. This only ** applies to *GMII and XAUI ports */ if (cvmx_helper_interface_get_mode(interface) == CVMX_HELPER_INTERFACE_MODE_RGMII || cvmx_helper_interface_get_mode(interface) == CVMX_HELPER_INTERFACE_MODE_SGMII || cvmx_helper_interface_get_mode(interface) == CVMX_HELPER_INTERFACE_MODE_GMII || cvmx_helper_interface_get_mode(interface) == CVMX_HELPER_INTERFACE_MODE_XAUI) { if (num_ports > 4) { cvmx_dprintf("__cvmx_helper_setup_gmx: Illegal " "num_ports\n"); return -1; } gmx_rx_prts.u64 = cvmx_read_csr(CVMX_GMXX_RX_PRTS(interface)); gmx_rx_prts.s.prts = num_ports; cvmx_write_csr(CVMX_GMXX_RX_PRTS(interface), gmx_rx_prts.u64); } /* Skip setting CVMX_PKO_REG_GMX_PORT_MODE on 30XX, 31XX, and 50XX */ if (!OCTEON_IS_MODEL(OCTEON_CN30XX) && !OCTEON_IS_MODEL(OCTEON_CN31XX) && !OCTEON_IS_MODEL(OCTEON_CN50XX)) { /* Tell PKO the number of ports on this interface */ pko_mode.u64 = cvmx_read_csr(CVMX_PKO_REG_GMX_PORT_MODE); if (interface == 0) { if (num_ports == 1) pko_mode.s.mode0 = 4; else if (num_ports == 2) pko_mode.s.mode0 = 3; else if (num_ports <= 4) pko_mode.s.mode0 = 2; else if (num_ports <= 8) pko_mode.s.mode0 = 1; else pko_mode.s.mode0 = 0; } else { if (num_ports == 1) pko_mode.s.mode1 = 4; else if (num_ports == 2) pko_mode.s.mode1 = 3; else if (num_ports <= 4) pko_mode.s.mode1 = 2; else if (num_ports <= 8) pko_mode.s.mode1 = 1; else pko_mode.s.mode1 = 0; } cvmx_write_csr(CVMX_PKO_REG_GMX_PORT_MODE, pko_mode.u64); } /* * Set GMX to buffer as much data as possible before starting * transmit. This reduces the chances that we have a TX under * run due to memory contention. Any packet that fits entirely * in the GMX FIFO can never have an under run regardless of * memory load. */ gmx_tx_thresh.u64 = cvmx_read_csr(CVMX_GMXX_TXX_THRESH(0, interface)); if (OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN31XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)) { /* These chips have a fixed max threshold of 0x40 */ gmx_tx_thresh.s.cnt = 0x40; } else { /* Choose the max value for the number of ports */ if (num_ports <= 1) gmx_tx_thresh.s.cnt = 0x100 / 1; else if (num_ports == 2) gmx_tx_thresh.s.cnt = 0x100 / 2; else gmx_tx_thresh.s.cnt = 0x100 / 4; } /* * SPI and XAUI can have lots of ports but the GMX hardware * only ever has a max of 4. */ if (num_ports > 4) num_ports = 4; for (index = 0; index < num_ports; index++) cvmx_write_csr(CVMX_GMXX_TXX_THRESH(index, interface), gmx_tx_thresh.u64); return 0; } /** * Returns the IPD/PKO port number for a port on the given * interface. * * @interface: Interface to use * @port: Port on the interface * * Returns IPD/PKO port number */ int cvmx_helper_get_ipd_port(int interface, int port) { switch (interface) { case 0: return port; case 1: return port + 16; case 2: return port + 32; case 3: return port + 36; case 4: return port + 40; case 5: return port + 44; } return -1; } EXPORT_SYMBOL_GPL(cvmx_helper_get_ipd_port); /** * Returns the interface number for an IPD/PKO port number. * * @ipd_port: IPD/PKO port number * * Returns Interface number */ int cvmx_helper_get_interface_num(int ipd_port) { if (ipd_port < 16) return 0; else if (ipd_port < 32) return 1; else if (ipd_port < 36) return 2; else if (ipd_port < 40) return 3; else if (ipd_port < 44) return 4; else if (ipd_port < 48) return 5; else cvmx_dprintf("cvmx_helper_get_interface_num: Illegal IPD " "port number\n"); return -1; } EXPORT_SYMBOL_GPL(cvmx_helper_get_interface_num); /** * Returns the interface index number for an IPD/PKO port * number. * * @ipd_port: IPD/PKO port number * * Returns Interface index number */ int cvmx_helper_get_interface_index_num(int ipd_port) { if (ipd_port < 32) return ipd_port & 15; else if (ipd_port < 36) return ipd_port & 3; else if (ipd_port < 40) return ipd_port & 3; else if (ipd_port < 44) return ipd_port & 3; else if (ipd_port < 48) return ipd_port & 3; else cvmx_dprintf("cvmx_helper_get_interface_index_num: " "Illegal IPD port number\n"); return -1; } EXPORT_SYMBOL_GPL(cvmx_helper_get_interface_index_num); |