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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 | # .gdbinit file # $Id$ # setting set width 0d70 set radix 0d16 debug_chaos # clk xin:cpu:bif:bus=1:4:2:1 define clock_init_on set *(unsigned long *)0x00ef4024 = 2 set *(unsigned long *)0x00ef4020 = 1 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x1 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 # set *(unsigned long *)0x00ef4008 = 0x0201 end # clk xin:cpu:bif:bus=1:4:1:1 define clock_init_on_1411 set *(unsigned long *)0x00ef4024 = 2 set *(unsigned long *)0x00ef4020 = 2 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x1 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 end # clk xin:cpu:bif:bus=1:4:2:1 define clock_init_on_1421 set *(unsigned long *)0x00ef4024 = 2 set *(unsigned long *)0x00ef4020 = 1 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x1 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 end # clk xin:cpu:bif:bus=1:8:2:1 define clock_init_on_1821 set *(unsigned long *)0x00ef4024 = 3 set *(unsigned long *)0x00ef4020 = 2 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x3 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 end # clk xin:cpu:bif:bus=1:8:4:1 define clock_init_on_1841 set *(unsigned long *)0x00ef4024 = 3 set *(unsigned long *)0x00ef4020 = 1 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x3 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 end # clk xin:cpu:bif:bus=1:16:8:1 define clock_init_on_11681 set *(unsigned long *)0x00ef4024 = 4 set *(unsigned long *)0x00ef4020 = 2 set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 set *(unsigned long *)0x00ef4004 = 0x7 shell sleep 0.1 set *(unsigned long *)0x00ef4008 = 0x0200 end # clk xin:cpu:bif:bus=1:1:1:1 define clock_init_off # CPU set *(unsigned long *)0x00ef4010 = 0 set *(unsigned long *)0x00ef4014 = 0 # BIF set *(unsigned long *)0x00ef4020 = 0 # BUS set *(unsigned long *)0x00ef4024 = 0 # PLL set *(unsigned long *)0x00ef4008 = 0x0000 end # Initialize programmable ports define port_init set $sfrbase = 0x00ef0000 set *(unsigned short *)0x00ef1060 = 0x5555 set *(unsigned short *)0x00ef1062 = 0x5555 set *(unsigned short *)0x00ef1064 = 0x5555 set *(unsigned short *)0x00ef1066 = 0x5555 set *(unsigned short *)0x00ef1068 = 0x5555 set *(unsigned short *)0x00ef106a = 0x0000 set *(unsigned short *)0x00ef106e = 0x5555 set *(unsigned short *)0x00ef1070 = 0x5555 # LED ON set *(unsigned char *)($sfrbase + 0x1015) = 0xff set *(unsigned char *)($sfrbase + 0x1085) = 0xff shell sleep 0.1 # LED OFF set *(unsigned char *)($sfrbase + 0x1085) = 0x00 end document port_init P5=LED(output), P6.b4=LAN_RESET(output) end # Initialize SDRAM controller for Mappi define sdram_init # SDIR0 set *(unsigned long *)0x00ef6008 = 0x00000182 # SDIR1 set *(unsigned long *)0x00ef600c = 0x00000001 # Initialize wait shell sleep 0.1 # Ch0-MOD set *(unsigned long *)0x00ef602c = 0x00000020 # Ch0-TR set *(unsigned long *)0x00ef6028 = 0x00010002 # Ch0-ADR set *(unsigned long *)0x00ef6020 = 0x08000004 # AutoRef On set *(unsigned long *)0x00ef6004 = 0x00010107 # Access enable set *(unsigned long *)0x00ef6024 = 0x00000001 end document sdram_init Mappi SDRAM controller initialization 0x08000000 - 0x0bffffff (64MB) end # Initialize LAN controller for Mappi define lanc_init set $sfrbase = 0x00ef0000 # Set BSEL3 (BSEL3 for the Chaos's bselc) # set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040 # set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101 set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000 set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103 set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001 # Reset (P5=LED,P6.b4=LAN_RESET) set *(unsigned short *)($sfrbase + 0x106c) = 0x0000 set *(unsigned char *)($sfrbase + 0x1016) = 0xff set *(unsigned char *)($sfrbase + 0x1086) = 0xff shell sleep 0.1 # set *(unsigned char *)($sfrbase + 0x1086) = 0x00 set *(unsigned char *)($sfrbase + 0x1086) = 0x04 set *(unsigned long *)(0x0c000330) = 0xffffffff # Set mac address set $lanc = (void*)0x0c000300 set *(unsigned long *)($lanc + 0x0000) = 0x00610010 set *(unsigned long *)($lanc + 0x0004) = 0x00200030 set *(unsigned long *)($lanc + 0x0008) = 0x00400050 set *(unsigned long *)($lanc + 0x000c) = 0x00600007 end document lanc_init Mappi LAN controller initialization ex.) MAC address: 10 20 30 40 50 60 end # LCD & CRT dual-head setting (8bpp) define dispc_init set $sfrbase = 0x00ef0000 # BSEL4 Dispc # 20MHz # set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282 # set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202 # 40MHz set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000 set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103 end # MMU enable define mmu_enable set $evb=0x88000000 set *(unsigned long *)0xffff0024=1 end # MMU disable define mmu_disable set $evb=0 set *(unsigned long *)0xffff0024=0 end # Show TLB entries define show_tlb_entries set $i = 0 set $addr = $arg0 use_mon_code while ($i < 0d32 ) set $tlb_tag = *(unsigned long*)$addr set $tlb_data = *(unsigned long*)($addr + 4) printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data set $i = $i + 1 set $addr = $addr + 8 end use_debug_dma end define itlb set $itlb=0xfe000000 show_tlb_entries $itlb end define dtlb set $dtlb=0xfe000800 show_tlb_entries $dtlb end # Show current task structure define show_current set $current = $spi & 0xffffe000 printf "$current=0x%08lX\n",$current print *(struct task_struct *)$current end # Show user assigned task structure define show_task set $task = $arg0 & 0xffffe000 printf "$task=0x%08lX\n",$task print *(struct task_struct *)$task end document show_task Show user assigned task structure arg0 : task structure address end # Show M32R registers define show_regs printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch printf "EVB[0x%08lX]\n",$evb end # Setup all define setup use_mon_code set *(unsigned int)0xfffffffc=0x60 shell sleep 0.1 # clock_init_on_1411 clock_init_on_1421 # clock_init_on_1821 # clock_init_on_1841 # clock_init_on_11681 # clock_init_off shell sleep 0.1 port_init sdram_init lanc_init dispc_init set $evb=0x08000000 end # Load modules define load_modules use_debug_dma load # load ramdisk_082a0000.mot # load romfs_082a0000.mot # use_mon_code end # Set kernel parameters define set_kernel_parameters set $param = (void*)0x08001000 # INITRD_START # set *(unsigned long *)($param + 0x0010) = 0x082a0000 # INITRD_SIZE # set *(unsigned long *)($param + 0x0014) = 0x00000000 # M32R_CPUCLK set *(unsigned long *)($param + 0x0018) = 0d160000000 # set *(unsigned long *)($param + 0x0018) = 0d80000000 # set *(unsigned long *)($param + 0x0018) = 0d40000000 # M32R_BUSCLK set *(unsigned long *)($param + 0x001c) = 0d40000000 # M32R_TIMER_DIVIDE set *(unsigned long *)($param + 0x0020) = 0d128 set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" # set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" end # Boot define boot set_kernel_parameters set $pc=0x08002000 set *(unsigned char *)0x08001003=0x03 si c end # Set breakpoints define set_breakpoints b *0x08000030 end ## Boot MP define boot_mp set_kernel_parameters set *(unsigned long *)0x00f00000 = boot - 0x80000000 set *(unsigned long *)0x00eff2f8 = 0x2 x 0x00eff2f8 set $pc=0x08002000 si c end document boot_mp Boot BSP end ## Boot UP define boot_up set_kernel_parameters set $pc=0x08002000 si c end document boot_up Boot BSP end # Restart define restart sdireset sdireset setup load_modules boot_mp end sdireset sdireset file vmlinux target m32rsdi setup |