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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 | /* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include "priv.h" #include <core/device.h> #include <core/option.h> static inline void nvkm_mc_unk260(struct nvkm_mc *pmc, u32 data) { const struct nvkm_mc_oclass *impl = (void *)nv_oclass(pmc); if (impl->unk260) impl->unk260(pmc, data); } static inline u32 nvkm_mc_intr_mask(struct nvkm_mc *pmc) { u32 intr = nv_rd32(pmc, 0x000100); if (intr == 0xffffffff) /* likely fallen off the bus */ intr = 0x00000000; return intr; } static irqreturn_t nvkm_mc_intr(int irq, void *arg) { struct nvkm_mc *pmc = arg; const struct nvkm_mc_oclass *oclass = (void *)nv_object(pmc)->oclass; const struct nvkm_mc_intr *map = oclass->intr; struct nvkm_subdev *unit; u32 intr; nv_wr32(pmc, 0x000140, 0x00000000); nv_rd32(pmc, 0x000140); intr = nvkm_mc_intr_mask(pmc); if (pmc->use_msi) oclass->msi_rearm(pmc); if (intr) { u32 stat = intr = nvkm_mc_intr_mask(pmc); while (map->stat) { if (intr & map->stat) { unit = nvkm_subdev(pmc, map->unit); if (unit && unit->intr) unit->intr(unit); stat &= ~map->stat; } map++; } if (stat) nv_error(pmc, "unknown intr 0x%08x\n", stat); } nv_wr32(pmc, 0x000140, 0x00000001); return intr ? IRQ_HANDLED : IRQ_NONE; } int _nvkm_mc_fini(struct nvkm_object *object, bool suspend) { struct nvkm_mc *pmc = (void *)object; nv_wr32(pmc, 0x000140, 0x00000000); return nvkm_subdev_fini(&pmc->base, suspend); } int _nvkm_mc_init(struct nvkm_object *object) { struct nvkm_mc *pmc = (void *)object; int ret = nvkm_subdev_init(&pmc->base); if (ret) return ret; nv_wr32(pmc, 0x000140, 0x00000001); return 0; } void _nvkm_mc_dtor(struct nvkm_object *object) { struct nvkm_device *device = nv_device(object); struct nvkm_mc *pmc = (void *)object; free_irq(pmc->irq, pmc); if (pmc->use_msi) pci_disable_msi(device->pdev); nvkm_subdev_destroy(&pmc->base); } int nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *bclass, int length, void **pobject) { const struct nvkm_mc_oclass *oclass = (void *)bclass; struct nvkm_device *device = nv_device(parent); struct nvkm_mc *pmc; int ret; ret = nvkm_subdev_create_(parent, engine, bclass, 0, "PMC", "master", length, pobject); pmc = *pobject; if (ret) return ret; pmc->unk260 = nvkm_mc_unk260; if (nv_device_is_pci(device)) { switch (device->pdev->device & 0x0ff0) { case 0x00f0: case 0x02e0: /* BR02? NFI how these would be handled yet exactly */ break; default: switch (device->chipset) { case 0xaa: /* reported broken, nv also disable it */ break; default: pmc->use_msi = true; break; } } pmc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI", pmc->use_msi); if (pmc->use_msi && oclass->msi_rearm) { pmc->use_msi = pci_enable_msi(device->pdev) == 0; if (pmc->use_msi) { nv_info(pmc, "MSI interrupts enabled\n"); oclass->msi_rearm(pmc); } } else { pmc->use_msi = false; } } ret = nv_device_get_irq(device, true); if (ret < 0) return ret; pmc->irq = ret; ret = request_irq(pmc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", pmc); if (ret < 0) return ret; return 0; } |