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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 | # .gdbinit file # $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $ # setting set width 0d70 set radix 0d16 use_debug_dma # Initialize SDRAM controller for Mappi define sdram_init # SDIR0 set *(unsigned long *)0x00ef6008=0x00000182 # SDIR1 set *(unsigned long *)0x00ef600c=0x00000001 # Initialize wait shell sleep 1 # Ch0-MOD set *(unsigned long *)0x00ef602c=0x00000020 # Ch0-TR set *(unsigned long *)0x00ef6028=0x00041302 # Ch0-ADR set *(unsigned long *)0x00ef6020=0x08000004 # AutoRef On set *(unsigned long *)0x00ef6004=0x00010705 # Access enable set *(unsigned long *)0x00ef6024=0x00000001 end document sdram_init Mappi SDRAM controller initialization 0x08000000 - 0x0bffffff (64MB) end # Initialize SDRAM controller for Mappi define sdram_init2 # SDIR0 set *(unsigned long *)0x00ef6008=0x00000182 # Ch0-MOD set *(unsigned long *)0x00ef602c=0x00000020 # Ch0-TR set *(unsigned long *)0x00ef6028=0x00010002 # Ch0-ADR set *(unsigned long *)0x00ef6020=0x08000004 # AutoRef On set *(unsigned long *)0x00ef6004=0x00010107 # SDIR1 set *(unsigned long *)0x00ef600c=0x00000001 # Initialize wait shell sleep 1 # Access enable set *(unsigned long *)0x00ef6024=0x00000001 shell sleep 1 end document sdram_init Mappi SDRAM controller initialization 0x08000000 - 0x0bffffff (64MB) end # Initialize LAN controller for Mappi define lanc_init # Set BSEL1 (BSEL3 for the Chaos's bselc) #set *(unsigned long *)0x00ef5004 = 0x0fff330f #set *(unsigned long *)0x00ef5004 = 0x01113301 # set *(unsigned long *)0x00ef5004 = 0x02011101 # set *(unsigned long *)0x00ef5004 = 0x04441104 # BSEL5 # set *(unsigned long *)0x00ef5014 = 0x0ccc310c # set *(unsigned long *)0x00ef5014 = 0x0303310f # set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG # set *(unsigned long *)0x00ef5014 = 0x03033103 set *(unsigned long *)0x00ef500c = 0x0b0b1304 set *(unsigned long *)0x00ef5010 = 0x03033302 # set *(unsigned long *)0x00ef5018 = 0x02223302 end # MMU enable define mmu_enable set $evb=0x88000000 set *(unsigned long *)0xffff0024=1 end # MMU disable define mmu_disable set $evb=0 set *(unsigned long *)0xffff0024=0 end # Show TLB entries define show_tlb_entries set $i = 0 set $addr = $arg0 while ($i < 0d16 ) set $tlb_tag = *(unsigned long*)$addr set $tlb_data = *(unsigned long*)($addr + 4) printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data set $i = $i + 1 set $addr = $addr + 8 end end define itlb set $itlb=0xfe000000 show_tlb_entries $itlb end define dtlb set $dtlb=0xfe000800 show_tlb_entries $dtlb end # Cache ON define set_cache_type set $mctype = (void*)0xfffffff8 # chaos # set *(unsigned long *)($mctype) = 0x0000c000 # m32102 i-cache only set *(unsigned long *)($mctype) = 0x00008000 # m32102 d-cache only # set *(unsigned long *)($mctype) = 0x00004000 end define cache_on set $param = (void*)0x08001000 set *(unsigned long *)($param) = 0x60ff6102 end # Show current task structure define show_current set $current = $spi & 0xffffe000 printf "$current=0x%08lX\n",$current print *(struct task_struct *)$current end # Show user assigned task structure define show_task set $task = $arg0 & 0xffffe000 printf "$task=0x%08lX\n",$task print *(struct task_struct *)$task end document show_task Show user assigned task structure arg0 : task structure address end # Show M32R registers define show_regs printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch printf "EVB[0x%08lX]\n",$evb set $mests = *(unsigned long *)0xffff000c set $mdeva = *(unsigned long *)0xffff0010 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva end # Setup all define setup sdram_init # lanc_init # dispc_init # set $evb=0x08000000 end # Load modules define load_modules use_debug_dma load # load busybox.mot end # Set kernel parameters define set_kernel_parameters set $param = (void*)0x08001000 ## MOUNT_ROOT_RDONLY set {long}($param+0x00)=0 ## RAMDISK_FLAGS #set {long}($param+0x04)=0 ## ORIG_ROOT_DEV #set {long}($param+0x08)=0x00000100 ## LOADER_TYPE #set {long}($param+0x0C)=0 ## INITRD_START set {long}($param+0x10)=0x082a0000 ## INITRD_SIZE set {long}($param+0x14)=0d6200000 # M32R_CPUCLK set *(unsigned long *)($param + 0x0018) = 0d25000000 # M32R_BUSCLK set *(unsigned long *)($param + 0x001c) = 0d25000000 # M32R_TIMER_DIVIDE set *(unsigned long *)($param + 0x0020) = 0d128 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0" end # Boot define boot set_kernel_parameters debug_chaos set $pc=0x08002000 set $fp=0 del b si end # Restart define restart sdireset sdireset setup load_modules boot end sdireset sdireset file vmlinux target m32rsdi restart boot |