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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 | /* * Copyright (C) 2012-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include "dt-bindings/clock/bcm281xx.h" #include "skeleton.dtsi" / { model = "BCM11351 SoC"; compatible = "brcm,bcm11351"; interrupt-parent = <&gic>; chosen { bootargs = "console=ttyS0,115200n8"; }; gic: interrupt-controller@3ff00100 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x3ff01000 0x1000>, <0x3ff00100 0x100>; }; smc@0x3404c000 { compatible = "brcm,bcm11351-smc", "brcm,kona-smc"; reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */ }; uart@3e000000 { compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; reg = <0x3e000000 0x1000>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; }; uart@3e001000 { compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; reg = <0x3e001000 0x1000>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; }; uart@3e002000 { compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; reg = <0x3e002000 0x1000>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; }; uart@3e003000 { compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; reg = <0x3e003000 0x1000>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; }; L2: l2-cache { compatible = "brcm,bcm11351-a2-pl310-cache"; reg = <0x3ff20000 0x1000>; cache-unified; cache-level = <2>; }; watchdog@35002f40 { compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt"; reg = <0x35002f40 0x6c>; }; timer@35006000 { compatible = "brcm,kona-timer"; reg = <0x35006000 0x1000>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>; }; gpio: gpio@35003000 { compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; reg = <0x35003000 0x800>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; #interrupt-cells = <2>; gpio-controller; interrupt-controller; }; sdio1: sdio@3f180000 { compatible = "brcm,kona-sdhci"; reg = <0x3f180000 0x10000>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>; status = "disabled"; }; sdio2: sdio@3f190000 { compatible = "brcm,kona-sdhci"; reg = <0x3f190000 0x10000>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>; status = "disabled"; }; sdio3: sdio@3f1a0000 { compatible = "brcm,kona-sdhci"; reg = <0x3f1a0000 0x10000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>; status = "disabled"; }; sdio4: sdio@3f1b0000 { compatible = "brcm,kona-sdhci"; reg = <0x3f1b0000 0x10000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>; status = "disabled"; }; pinctrl@35004800 { compatible = "brcm,bcm11351-pinctrl"; reg = <0x35004800 0x430>; }; i2c@3e016000 { compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; reg = <0x3e016000 0x80>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>; status = "disabled"; }; i2c@3e017000 { compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; reg = <0x3e017000 0x80>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>; status = "disabled"; }; i2c@3e018000 { compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; reg = <0x3e018000 0x80>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>; status = "disabled"; }; i2c@3500d000 { compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; reg = <0x3500d000 0x80>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>; status = "disabled"; }; clocks { #address-cells = <1>; #size-cells = <1>; ranges; root_ccu: root_ccu { compatible = "brcm,bcm11351-root-ccu"; reg = <0x35001000 0x0f00>; #clock-cells = <1>; clock-output-names = "frac_1m"; }; hub_ccu: hub_ccu { compatible = "brcm,bcm11351-hub-ccu"; reg = <0x34000000 0x0f00>; #clock-cells = <1>; clock-output-names = "tmon_1m"; }; aon_ccu: aon_ccu { compatible = "brcm,bcm11351-aon-ccu"; reg = <0x35002000 0x0f00>; #clock-cells = <1>; clock-output-names = "hub_timer", "pmu_bsc", "pmu_bsc_var"; }; master_ccu: master_ccu { compatible = "brcm,bcm11351-master-ccu"; reg = <0x3f001000 0x0f00>; #clock-cells = <1>; clock-output-names = "sdio1", "sdio2", "sdio3", "sdio4", "usb_ic", "hsic2_48m", "hsic2_12m"; }; slave_ccu: slave_ccu { compatible = "brcm,bcm11351-slave-ccu"; reg = <0x3e011000 0x0f00>; #clock-cells = <1>; clock-output-names = "uartb", "uartb2", "uartb3", "uartb4", "ssp0", "ssp2", "bsc1", "bsc2", "bsc3", "pwm"; }; ref_1m_clk: ref_1m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1000000>; }; ref_32k_clk: ref_32k { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; bbl_32k_clk: bbl_32k { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; ref_13m_clk: ref_13m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <13000000>; }; var_13m_clk: var_13m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <13000000>; }; dft_19_5m_clk: dft_19_5m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <19500000>; }; ref_crystal_clk: ref_crystal { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <26000000>; }; ref_cx40_clk: ref_cx40 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <40000000>; }; ref_52m_clk: ref_52m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <52000000>; }; var_52m_clk: var_52m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <52000000>; }; usb_otg_ahb_clk: usb_otg_ahb { compatible = "fixed-clock"; clock-frequency = <52000000>; #clock-cells = <0>; }; ref_96m_clk: ref_96m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <96000000>; }; var_96m_clk: var_96m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <96000000>; }; ref_104m_clk: ref_104m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <104000000>; }; var_104m_clk: var_104m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <104000000>; }; ref_156m_clk: ref_156m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <156000000>; }; var_156m_clk: var_156m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <156000000>; }; ref_208m_clk: ref_208m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <208000000>; }; var_208m_clk: var_208m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <208000000>; }; ref_312m_clk: ref_312m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <312000000>; }; var_312m_clk: var_312m { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <312000000>; }; }; usbotg: usb@3f120000 { compatible = "snps,dwc2"; reg = <0x3f120000 0x10000>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; clocks = <&usb_otg_ahb_clk>; clock-names = "otg"; phys = <&usbphy>; phy-names = "usb2-phy"; status = "disabled"; }; usbphy: usb-phy@3f130000 { compatible = "brcm,kona-usb2-phy"; reg = <0x3f130000 0x28>; #phy-cells = <0>; status = "disabled"; }; }; |