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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 | /* * Device Tree Source for the SH73A0 SoC * * Copyright (C) 2012 Renesas Solutions Corp. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ /include/ "skeleton.dtsi" #include <dt-bindings/interrupt-controller/irq.h> / { compatible = "renesas,sh73a0"; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; }; }; gic: interrupt-controller@f0001000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; reg = <0xf0001000 0x1000>, <0xf0000100 0x100>; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>, <0 56 IRQ_TYPE_LEVEL_HIGH>; }; irqpin0: irqpin@e6900000 { compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; reg = <0xe6900000 4>, <0xe6900010 4>, <0xe6900020 1>, <0xe6900040 1>, <0xe6900060 1>; interrupt-parent = <&gic>; interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH 0 2 IRQ_TYPE_LEVEL_HIGH 0 3 IRQ_TYPE_LEVEL_HIGH 0 4 IRQ_TYPE_LEVEL_HIGH 0 5 IRQ_TYPE_LEVEL_HIGH 0 6 IRQ_TYPE_LEVEL_HIGH 0 7 IRQ_TYPE_LEVEL_HIGH 0 8 IRQ_TYPE_LEVEL_HIGH>; }; irqpin1: irqpin@e6900004 { compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; reg = <0xe6900004 4>, <0xe6900014 4>, <0xe6900024 1>, <0xe6900044 1>, <0xe6900064 1>; interrupt-parent = <&gic>; interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH 0 10 IRQ_TYPE_LEVEL_HIGH 0 11 IRQ_TYPE_LEVEL_HIGH 0 12 IRQ_TYPE_LEVEL_HIGH 0 13 IRQ_TYPE_LEVEL_HIGH 0 14 IRQ_TYPE_LEVEL_HIGH 0 15 IRQ_TYPE_LEVEL_HIGH 0 16 IRQ_TYPE_LEVEL_HIGH>; control-parent; }; irqpin2: irqpin@e6900008 { compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; reg = <0xe6900008 4>, <0xe6900018 4>, <0xe6900028 1>, <0xe6900048 1>, <0xe6900068 1>; interrupt-parent = <&gic>; interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH 0 18 IRQ_TYPE_LEVEL_HIGH 0 19 IRQ_TYPE_LEVEL_HIGH 0 20 IRQ_TYPE_LEVEL_HIGH 0 21 IRQ_TYPE_LEVEL_HIGH 0 22 IRQ_TYPE_LEVEL_HIGH 0 23 IRQ_TYPE_LEVEL_HIGH 0 24 IRQ_TYPE_LEVEL_HIGH>; }; irqpin3: irqpin@e690000c { compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; reg = <0xe690000c 4>, <0xe690001c 4>, <0xe690002c 1>, <0xe690004c 1>, <0xe690006c 1>; interrupt-parent = <&gic>; interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH 0 26 IRQ_TYPE_LEVEL_HIGH 0 27 IRQ_TYPE_LEVEL_HIGH 0 28 IRQ_TYPE_LEVEL_HIGH 0 29 IRQ_TYPE_LEVEL_HIGH 0 30 IRQ_TYPE_LEVEL_HIGH 0 31 IRQ_TYPE_LEVEL_HIGH 0 32 IRQ_TYPE_LEVEL_HIGH>; }; i2c0: i2c@e6820000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0xe6820000 0x425>; interrupt-parent = <&gic>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH 0 168 IRQ_TYPE_LEVEL_HIGH 0 169 IRQ_TYPE_LEVEL_HIGH 0 170 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c1: i2c@e6822000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0xe6822000 0x425>; interrupt-parent = <&gic>; interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH 0 52 IRQ_TYPE_LEVEL_HIGH 0 53 IRQ_TYPE_LEVEL_HIGH 0 54 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c2: i2c@e6824000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0xe6824000 0x425>; interrupt-parent = <&gic>; interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH 0 172 IRQ_TYPE_LEVEL_HIGH 0 173 IRQ_TYPE_LEVEL_HIGH 0 174 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c3: i2c@e6826000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0xe6826000 0x425>; interrupt-parent = <&gic>; interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH 0 184 IRQ_TYPE_LEVEL_HIGH 0 185 IRQ_TYPE_LEVEL_HIGH 0 186 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c4: i2c@e6828000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0xe6828000 0x425>; interrupt-parent = <&gic>; interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH 0 188 IRQ_TYPE_LEVEL_HIGH 0 189 IRQ_TYPE_LEVEL_HIGH 0 190 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; mmcif: mmc@e6bd0000 { compatible = "renesas,sh-mmcif"; reg = <0xe6bd0000 0x100>; interrupt-parent = <&gic>; interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH 0 141 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <4>; status = "disabled"; }; sdhi0: sd@ee100000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee100000 0x100>; interrupt-parent = <&gic>; interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH 0 84 IRQ_TYPE_LEVEL_HIGH 0 85 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; status = "disabled"; }; /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ sdhi1: sd@ee120000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee120000 0x100>; interrupt-parent = <&gic>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH 0 89 IRQ_TYPE_LEVEL_HIGH>; toshiba,mmc-wrprotect-disable; cap-sd-highspeed; status = "disabled"; }; sdhi2: sd@ee140000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee140000 0x100>; interrupt-parent = <&gic>; interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH 0 105 IRQ_TYPE_LEVEL_HIGH>; toshiba,mmc-wrprotect-disable; cap-sd-highspeed; status = "disabled"; }; pfc: pfc@e6050000 { compatible = "renesas,pfc-sh73a0"; reg = <0xe6050000 0x8000>, <0xe605801c 0x1c>; gpio-controller; #gpio-cells = <2>; interrupts-extended = <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; }; sh_fsi2: sound@ec230000 { #sound-dai-cells = <1>; compatible = "renesas,sh_fsi2"; reg = <0xec230000 0x400>; interrupt-parent = <&gic>; interrupts = <0 146 0x4>; status = "disabled"; }; }; |