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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 | /* * Copyright (C) 2012 Russell King * Rewritten from the dovefb driver, and Armada510 manuals. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <drm/drmP.h> #include "armada_crtc.h" #include "armada_drm.h" #include "armada_fb.h" #include "armada_gem.h" #include "armada_hw.h" #include <drm/armada_drm.h> #include "armada_ioctlP.h" struct armada_plane_properties { uint32_t colorkey_yr; uint32_t colorkey_ug; uint32_t colorkey_vb; #define K2R(val) (((val) >> 0) & 0xff) #define K2G(val) (((val) >> 8) & 0xff) #define K2B(val) (((val) >> 16) & 0xff) int16_t brightness; uint16_t contrast; uint16_t saturation; uint32_t colorkey_mode; }; struct armada_plane { struct drm_plane base; spinlock_t lock; struct drm_framebuffer *old_fb; uint32_t src_hw; uint32_t dst_hw; uint32_t dst_yx; uint32_t ctrl0; struct { struct armada_vbl_event update; struct armada_regs regs[13]; wait_queue_head_t wait; } vbl; struct armada_plane_properties prop; }; #define drm_to_armada_plane(p) container_of(p, struct armada_plane, base) static void armada_ovl_update_attr(struct armada_plane_properties *prop, struct armada_crtc *dcrtc) { writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y); writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U); writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V); writel_relaxed(prop->brightness << 16 | prop->contrast, dcrtc->base + LCD_SPU_CONTRAST); /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */ writel_relaxed(prop->saturation << 16, dcrtc->base + LCD_SPU_SATURATION); writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE); spin_lock_irq(&dcrtc->irq_lock); armada_updatel(prop->colorkey_mode | CFG_ALPHAM_GRA, CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK, dcrtc->base + LCD_SPU_DMA_CTRL1); armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG); spin_unlock_irq(&dcrtc->irq_lock); } /* === Plane support === */ static void armada_plane_vbl(struct armada_crtc *dcrtc, void *data) { struct armada_plane *dplane = data; struct drm_framebuffer *fb; armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs); spin_lock(&dplane->lock); fb = dplane->old_fb; dplane->old_fb = NULL; spin_unlock(&dplane->lock); if (fb) armada_drm_queue_unref_work(dcrtc->crtc.dev, fb); } static unsigned armada_limit(int start, unsigned size, unsigned max) { int end = start + size; if (end < 0) return 0; if (start < 0) start = 0; return (unsigned)end > max ? max - start : end - start; } static int armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) { struct armada_plane *dplane = drm_to_armada_plane(plane); struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); uint32_t val, ctrl0; unsigned idx = 0; int ret; crtc_w = armada_limit(crtc_x, crtc_w, dcrtc->crtc.mode.hdisplay); crtc_h = armada_limit(crtc_y, crtc_h, dcrtc->crtc.mode.vdisplay); ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) | CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) | CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA; /* Does the position/size result in nothing to display? */ if (crtc_w == 0 || crtc_h == 0) { ctrl0 &= ~CFG_DMA_ENA; } /* * FIXME: if the starting point is off screen, we need to * adjust src_x, src_y, src_w, src_h appropriately, and * according to the scale. */ if (!dcrtc->plane) { dcrtc->plane = plane; armada_ovl_update_attr(&dplane->prop, dcrtc); } /* FIXME: overlay on an interlaced display */ /* Just updating the position/size? */ if (plane->fb == fb && dplane->ctrl0 == ctrl0) { val = (src_h & 0xffff0000) | src_w >> 16; dplane->src_hw = val; writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN); val = crtc_h << 16 | crtc_w; dplane->dst_hw = val; writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN); val = crtc_y << 16 | crtc_x; dplane->dst_yx = val; writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN); return 0; } else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) { /* Power up the Y/U/V FIFOs on ENA 0->1 transitions */ armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66, dcrtc->base + LCD_SPU_SRAM_PARA1); } ret = wait_event_timeout(dplane->vbl.wait, list_empty(&dplane->vbl.update.node), HZ/25); if (ret < 0) return ret; if (plane->fb != fb) { struct armada_gem_object *obj = drm_fb_obj(fb); uint32_t sy, su, sv; /* * Take a reference on the new framebuffer - we want to * hold on to it while the hardware is displaying it. */ drm_framebuffer_reference(fb); if (plane->fb) { struct drm_framebuffer *older_fb; spin_lock_irq(&dplane->lock); older_fb = dplane->old_fb; dplane->old_fb = plane->fb; spin_unlock_irq(&dplane->lock); if (older_fb) armada_drm_queue_unref_work(dcrtc->crtc.dev, older_fb); } src_y >>= 16; src_x >>= 16; sy = obj->dev_addr + fb->offsets[0] + src_y * fb->pitches[0] + src_x * fb->bits_per_pixel / 8; su = obj->dev_addr + fb->offsets[1] + src_y * fb->pitches[1] + src_x; sv = obj->dev_addr + fb->offsets[2] + src_y * fb->pitches[2] + src_x; armada_reg_queue_set(dplane->vbl.regs, idx, sy, LCD_SPU_DMA_START_ADDR_Y0); armada_reg_queue_set(dplane->vbl.regs, idx, su, LCD_SPU_DMA_START_ADDR_U0); armada_reg_queue_set(dplane->vbl.regs, idx, sv, LCD_SPU_DMA_START_ADDR_V0); armada_reg_queue_set(dplane->vbl.regs, idx, sy, LCD_SPU_DMA_START_ADDR_Y1); armada_reg_queue_set(dplane->vbl.regs, idx, su, LCD_SPU_DMA_START_ADDR_U1); armada_reg_queue_set(dplane->vbl.regs, idx, sv, LCD_SPU_DMA_START_ADDR_V1); val = fb->pitches[0] << 16 | fb->pitches[0]; armada_reg_queue_set(dplane->vbl.regs, idx, val, LCD_SPU_DMA_PITCH_YC); val = fb->pitches[1] << 16 | fb->pitches[2]; armada_reg_queue_set(dplane->vbl.regs, idx, val, LCD_SPU_DMA_PITCH_UV); } val = (src_h & 0xffff0000) | src_w >> 16; if (dplane->src_hw != val) { dplane->src_hw = val; armada_reg_queue_set(dplane->vbl.regs, idx, val, LCD_SPU_DMA_HPXL_VLN); } val = crtc_h << 16 | crtc_w; if (dplane->dst_hw != val) { dplane->dst_hw = val; armada_reg_queue_set(dplane->vbl.regs, idx, val, LCD_SPU_DZM_HPXL_VLN); } val = crtc_y << 16 | crtc_x; if (dplane->dst_yx != val) { dplane->dst_yx = val; armada_reg_queue_set(dplane->vbl.regs, idx, val, LCD_SPU_DMA_OVSA_HPXL_VLN); } if (dplane->ctrl0 != ctrl0) { dplane->ctrl0 = ctrl0; armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0, CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE | CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE | CFG_DMA_MOD(CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU | CFG_YUV2RGB) | CFG_DMA_ENA, LCD_SPU_DMA_CTRL0); } if (idx) { armada_reg_queue_end(dplane->vbl.regs, idx); armada_drm_vbl_event_add(dcrtc, &dplane->vbl.update); } return 0; } static int armada_plane_disable(struct drm_plane *plane) { struct armada_plane *dplane = drm_to_armada_plane(plane); struct drm_framebuffer *fb; struct armada_crtc *dcrtc; if (!dplane->base.crtc) return 0; dcrtc = drm_to_armada_crtc(dplane->base.crtc); dcrtc->plane = NULL; spin_lock_irq(&dcrtc->irq_lock); armada_drm_vbl_event_remove(dcrtc, &dplane->vbl.update); armada_updatel(0, CFG_DMA_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0); dplane->ctrl0 = 0; spin_unlock_irq(&dcrtc->irq_lock); /* Power down the Y/U/V FIFOs */ armada_updatel(CFG_PDWN16x66 | CFG_PDWN32x66, 0, dcrtc->base + LCD_SPU_SRAM_PARA1); if (plane->fb) drm_framebuffer_unreference(plane->fb); spin_lock_irq(&dplane->lock); fb = dplane->old_fb; dplane->old_fb = NULL; spin_unlock_irq(&dplane->lock); if (fb) drm_framebuffer_unreference(fb); return 0; } static void armada_plane_destroy(struct drm_plane *plane) { kfree(plane); } static int armada_plane_set_property(struct drm_plane *plane, struct drm_property *property, uint64_t val) { struct armada_private *priv = plane->dev->dev_private; struct armada_plane *dplane = drm_to_armada_plane(plane); bool update_attr = false; if (property == priv->colorkey_prop) { #define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8) dplane->prop.colorkey_yr = CCC(K2R(val)); dplane->prop.colorkey_ug = CCC(K2G(val)); dplane->prop.colorkey_vb = CCC(K2B(val)); #undef CCC update_attr = true; } else if (property == priv->colorkey_min_prop) { dplane->prop.colorkey_yr &= ~0x00ff0000; dplane->prop.colorkey_yr |= K2R(val) << 16; dplane->prop.colorkey_ug &= ~0x00ff0000; dplane->prop.colorkey_ug |= K2G(val) << 16; dplane->prop.colorkey_vb &= ~0x00ff0000; dplane->prop.colorkey_vb |= K2B(val) << 16; update_attr = true; } else if (property == priv->colorkey_max_prop) { dplane->prop.colorkey_yr &= ~0xff000000; dplane->prop.colorkey_yr |= K2R(val) << 24; dplane->prop.colorkey_ug &= ~0xff000000; dplane->prop.colorkey_ug |= K2G(val) << 24; dplane->prop.colorkey_vb &= ~0xff000000; dplane->prop.colorkey_vb |= K2B(val) << 24; update_attr = true; } else if (property == priv->colorkey_val_prop) { dplane->prop.colorkey_yr &= ~0x0000ff00; dplane->prop.colorkey_yr |= K2R(val) << 8; dplane->prop.colorkey_ug &= ~0x0000ff00; dplane->prop.colorkey_ug |= K2G(val) << 8; dplane->prop.colorkey_vb &= ~0x0000ff00; dplane->prop.colorkey_vb |= K2B(val) << 8; update_attr = true; } else if (property == priv->colorkey_alpha_prop) { dplane->prop.colorkey_yr &= ~0x000000ff; dplane->prop.colorkey_yr |= K2R(val); dplane->prop.colorkey_ug &= ~0x000000ff; dplane->prop.colorkey_ug |= K2G(val); dplane->prop.colorkey_vb &= ~0x000000ff; dplane->prop.colorkey_vb |= K2B(val); update_attr = true; } else if (property == priv->colorkey_mode_prop) { dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK; dplane->prop.colorkey_mode |= CFG_CKMODE(val); update_attr = true; } else if (property == priv->brightness_prop) { dplane->prop.brightness = val - 256; update_attr = true; } else if (property == priv->contrast_prop) { dplane->prop.contrast = val; update_attr = true; } else if (property == priv->saturation_prop) { dplane->prop.saturation = val; update_attr = true; } if (update_attr && dplane->base.crtc) armada_ovl_update_attr(&dplane->prop, drm_to_armada_crtc(dplane->base.crtc)); return 0; } static const struct drm_plane_funcs armada_plane_funcs = { .update_plane = armada_plane_update, .disable_plane = armada_plane_disable, .destroy = armada_plane_destroy, .set_property = armada_plane_set_property, }; static const uint32_t armada_formats[] = { DRM_FORMAT_UYVY, DRM_FORMAT_YUYV, DRM_FORMAT_YUV420, DRM_FORMAT_YVU420, DRM_FORMAT_YUV422, DRM_FORMAT_YVU422, DRM_FORMAT_VYUY, DRM_FORMAT_YVYU, DRM_FORMAT_ARGB8888, DRM_FORMAT_ABGR8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_RGB888, DRM_FORMAT_BGR888, DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR1555, DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, }; static struct drm_prop_enum_list armada_drm_colorkey_enum_list[] = { { CKMODE_DISABLE, "disabled" }, { CKMODE_Y, "Y component" }, { CKMODE_U, "U component" }, { CKMODE_V, "V component" }, { CKMODE_RGB, "RGB" }, { CKMODE_R, "R component" }, { CKMODE_G, "G component" }, { CKMODE_B, "B component" }, }; static int armada_overlay_create_properties(struct drm_device *dev) { struct armada_private *priv = dev->dev_private; if (priv->colorkey_prop) return 0; priv->colorkey_prop = drm_property_create_range(dev, 0, "colorkey", 0, 0xffffff); priv->colorkey_min_prop = drm_property_create_range(dev, 0, "colorkey_min", 0, 0xffffff); priv->colorkey_max_prop = drm_property_create_range(dev, 0, "colorkey_max", 0, 0xffffff); priv->colorkey_val_prop = drm_property_create_range(dev, 0, "colorkey_val", 0, 0xffffff); priv->colorkey_alpha_prop = drm_property_create_range(dev, 0, "colorkey_alpha", 0, 0xffffff); priv->colorkey_mode_prop = drm_property_create_enum(dev, 0, "colorkey_mode", armada_drm_colorkey_enum_list, ARRAY_SIZE(armada_drm_colorkey_enum_list)); priv->brightness_prop = drm_property_create_range(dev, 0, "brightness", 0, 256 + 255); priv->contrast_prop = drm_property_create_range(dev, 0, "contrast", 0, 0x7fff); priv->saturation_prop = drm_property_create_range(dev, 0, "saturation", 0, 0x7fff); if (!priv->colorkey_prop) return -ENOMEM; return 0; } int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs) { struct armada_private *priv = dev->dev_private; struct drm_mode_object *mobj; struct armada_plane *dplane; int ret; ret = armada_overlay_create_properties(dev); if (ret) return ret; dplane = kzalloc(sizeof(*dplane), GFP_KERNEL); if (!dplane) return -ENOMEM; spin_lock_init(&dplane->lock); init_waitqueue_head(&dplane->vbl.wait); armada_drm_vbl_event_init(&dplane->vbl.update, armada_plane_vbl, dplane); drm_plane_init(dev, &dplane->base, crtcs, &armada_plane_funcs, armada_formats, ARRAY_SIZE(armada_formats), false); dplane->prop.colorkey_yr = 0xfefefe00; dplane->prop.colorkey_ug = 0x01010100; dplane->prop.colorkey_vb = 0x01010100; dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB); dplane->prop.brightness = 0; dplane->prop.contrast = 0x4000; dplane->prop.saturation = 0x4000; mobj = &dplane->base.base; drm_object_attach_property(mobj, priv->colorkey_prop, 0x0101fe); drm_object_attach_property(mobj, priv->colorkey_min_prop, 0x0101fe); drm_object_attach_property(mobj, priv->colorkey_max_prop, 0x0101fe); drm_object_attach_property(mobj, priv->colorkey_val_prop, 0x0101fe); drm_object_attach_property(mobj, priv->colorkey_alpha_prop, 0x000000); drm_object_attach_property(mobj, priv->colorkey_mode_prop, CKMODE_RGB); drm_object_attach_property(mobj, priv->brightness_prop, 256); drm_object_attach_property(mobj, priv->contrast_prop, dplane->prop.contrast); drm_object_attach_property(mobj, priv->saturation_prop, dplane->prop.saturation); return 0; } |