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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 | /* * linux/drivers/video/bt431.h * * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this * archive for more details. */ #include <linux/types.h> /* * Bt431 cursor generator registers, 32-bit aligned. * Two twin Bt431 are used on the DECstation's PMAG-AA. */ struct bt431_regs { volatile u16 addr_lo; u16 pad0; volatile u16 addr_hi; u16 pad1; volatile u16 addr_cmap; u16 pad2; volatile u16 addr_reg; u16 pad3; }; static inline u16 bt431_set_value(u8 val) { return ((val << 8) | (val & 0xff)) & 0xffff; } static inline u8 bt431_get_value(u16 val) { return val & 0xff; } /* * Additional registers addressed indirectly. */ #define BT431_REG_CMD 0x0000 #define BT431_REG_CXLO 0x0001 #define BT431_REG_CXHI 0x0002 #define BT431_REG_CYLO 0x0003 #define BT431_REG_CYHI 0x0004 #define BT431_REG_WXLO 0x0005 #define BT431_REG_WXHI 0x0006 #define BT431_REG_WYLO 0x0007 #define BT431_REG_WYHI 0x0008 #define BT431_REG_WWLO 0x0009 #define BT431_REG_WWHI 0x000a #define BT431_REG_WHLO 0x000b #define BT431_REG_WHHI 0x000c #define BT431_REG_CRAM_BASE 0x0000 #define BT431_REG_CRAM_END 0x01ff /* * Command register. */ #define BT431_CMD_CURS_ENABLE 0x40 #define BT431_CMD_XHAIR_ENABLE 0x20 #define BT431_CMD_OR_CURSORS 0x10 #define BT431_CMD_AND_CURSORS 0x00 #define BT431_CMD_1_1_MUX 0x00 #define BT431_CMD_4_1_MUX 0x04 #define BT431_CMD_5_1_MUX 0x08 #define BT431_CMD_xxx_MUX 0x0c #define BT431_CMD_THICK_1 0x00 #define BT431_CMD_THICK_3 0x01 #define BT431_CMD_THICK_5 0x02 #define BT431_CMD_THICK_7 0x03 static inline void bt431_select_reg(struct bt431_regs *regs, int ir) { /* * The compiler splits the write in two bytes without these * helper variables. */ volatile u16 *lo = &(regs->addr_lo); volatile u16 *hi = &(regs->addr_hi); mb(); *lo = bt431_set_value(ir & 0xff); wmb(); *hi = bt431_set_value((ir >> 8) & 0xff); } /* Autoincrement read/write. */ static inline u8 bt431_read_reg_inc(struct bt431_regs *regs) { /* * The compiler splits the write in two bytes without the * helper variable. */ volatile u16 *r = &(regs->addr_reg); mb(); return bt431_get_value(*r); } static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value) { /* * The compiler splits the write in two bytes without the * helper variable. */ volatile u16 *r = &(regs->addr_reg); mb(); *r = bt431_set_value(value); } static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir) { bt431_select_reg(regs, ir); return bt431_read_reg_inc(regs); } static inline void bt431_write_reg(struct bt431_regs *regs, int ir, u8 value) { bt431_select_reg(regs, ir); bt431_write_reg_inc(regs, value); } /* Autoincremented read/write for the cursor map. */ static inline u16 bt431_read_cmap_inc(struct bt431_regs *regs) { /* * The compiler splits the write in two bytes without the * helper variable. */ volatile u16 *r = &(regs->addr_cmap); mb(); return *r; } static inline void bt431_write_cmap_inc(struct bt431_regs *regs, u16 value) { /* * The compiler splits the write in two bytes without the * helper variable. */ volatile u16 *r = &(regs->addr_cmap); mb(); *r = value; } static inline u16 bt431_read_cmap(struct bt431_regs *regs, int cr) { bt431_select_reg(regs, cr); return bt431_read_cmap_inc(regs); } static inline void bt431_write_cmap(struct bt431_regs *regs, int cr, u16 value) { bt431_select_reg(regs, cr); bt431_write_cmap_inc(regs, value); } static inline void bt431_enable_cursor(struct bt431_regs *regs) { bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_CURS_ENABLE | BT431_CMD_OR_CURSORS | BT431_CMD_4_1_MUX | BT431_CMD_THICK_1); } static inline void bt431_erase_cursor(struct bt431_regs *regs) { bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_4_1_MUX); } static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y) { /* * Magic from the MACH sources. * * Cx = x + D + H - P * P = 37 if 1:1, 52 if 4:1, 57 if 5:1 * D = pixel skew between outdata and external data * H = pixels between HSYNCH falling and active video * * Cy = y + V - 32 * V = scanlines between HSYNCH falling, two or more * clocks after VSYNCH falling, and active video */ x += 412 - 52; y += 68 - 32; /* Use autoincrement. */ bt431_select_reg(regs, BT431_REG_CXLO); bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */ bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */ bt431_write_reg_inc(regs, y & 0xff); /* BT431_REG_CYLO */ bt431_write_reg_inc(regs, (y >> 8) & 0x0f); /* BT431_REG_CYHI */ } static inline void bt431_set_font(struct bt431_regs *regs, u8 fgc, u16 width, u16 height) { int i; u16 fgp = fgc ? 0xffff : 0x0000; u16 bgp = fgc ? 0x0000 : 0xffff; bt431_select_reg(regs, BT431_REG_CRAM_BASE); for (i = BT431_REG_CRAM_BASE; i <= BT431_REG_CRAM_END; i++) { u16 value; if (height << 6 <= i << 3) value = bgp; else if (width <= i % 8 << 3) value = bgp; else if (((width >> 3) & 0xffff) > i % 8) value = fgp; else value = fgp & ~(bgp << (width % 8 << 1)); bt431_write_cmap_inc(regs, value); } } static inline void bt431_init_cursor(struct bt431_regs *regs) { /* no crosshair window */ bt431_select_reg(regs, BT431_REG_WXLO); bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXLO */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXHI */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYLO */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYHI */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWLO */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWHI */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHLO */ bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHHI */ } |