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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 | /* * TI OMAP1 Real Time Clock interface for Linux * * Copyright (C) 2003 MontaVista Software, Inc. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> * * Copyright (C) 2006 David Brownell (new RTC framework) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> #include <linux/ioport.h> #include <linux/delay.h> #include <linux/rtc.h> #include <linux/bcd.h> #include <linux/platform_device.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/pm_runtime.h> #include <asm/io.h> /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock * with century-range alarm matching, driven by the 32kHz clock. * * The main user-visible ways it differs from PC RTCs are by omitting * "don't care" alarm fields and sub-second periodic IRQs, and having * an autoadjust mechanism to calibrate to the true oscillator rate. * * Board-specific wiring options include using split power mode with * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from * low power modes) for OMAP1 boards (OMAP-L138 has this built into * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment. */ #define DRIVER_NAME "omap_rtc" #define OMAP_RTC_BASE 0xfffb4800 /* RTC registers */ #define OMAP_RTC_SECONDS_REG 0x00 #define OMAP_RTC_MINUTES_REG 0x04 #define OMAP_RTC_HOURS_REG 0x08 #define OMAP_RTC_DAYS_REG 0x0C #define OMAP_RTC_MONTHS_REG 0x10 #define OMAP_RTC_YEARS_REG 0x14 #define OMAP_RTC_WEEKS_REG 0x18 #define OMAP_RTC_ALARM_SECONDS_REG 0x20 #define OMAP_RTC_ALARM_MINUTES_REG 0x24 #define OMAP_RTC_ALARM_HOURS_REG 0x28 #define OMAP_RTC_ALARM_DAYS_REG 0x2c #define OMAP_RTC_ALARM_MONTHS_REG 0x30 #define OMAP_RTC_ALARM_YEARS_REG 0x34 #define OMAP_RTC_CTRL_REG 0x40 #define OMAP_RTC_STATUS_REG 0x44 #define OMAP_RTC_INTERRUPTS_REG 0x48 #define OMAP_RTC_COMP_LSB_REG 0x4c #define OMAP_RTC_COMP_MSB_REG 0x50 #define OMAP_RTC_OSC_REG 0x54 #define OMAP_RTC_KICK0_REG 0x6c #define OMAP_RTC_KICK1_REG 0x70 /* OMAP_RTC_CTRL_REG bit fields: */ #define OMAP_RTC_CTRL_SPLIT (1<<7) #define OMAP_RTC_CTRL_DISABLE (1<<6) #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5) #define OMAP_RTC_CTRL_TEST (1<<4) #define OMAP_RTC_CTRL_MODE_12_24 (1<<3) #define OMAP_RTC_CTRL_AUTO_COMP (1<<2) #define OMAP_RTC_CTRL_ROUND_30S (1<<1) #define OMAP_RTC_CTRL_STOP (1<<0) /* OMAP_RTC_STATUS_REG bit fields: */ #define OMAP_RTC_STATUS_POWER_UP (1<<7) #define OMAP_RTC_STATUS_ALARM (1<<6) #define OMAP_RTC_STATUS_1D_EVENT (1<<5) #define OMAP_RTC_STATUS_1H_EVENT (1<<4) #define OMAP_RTC_STATUS_1M_EVENT (1<<3) #define OMAP_RTC_STATUS_1S_EVENT (1<<2) #define OMAP_RTC_STATUS_RUN (1<<1) #define OMAP_RTC_STATUS_BUSY (1<<0) /* OMAP_RTC_INTERRUPTS_REG bit fields: */ #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) /* OMAP_RTC_KICKER values */ #define KICK0_VALUE 0x83e70b13 #define KICK1_VALUE 0x95a4f1e0 #define OMAP_RTC_HAS_KICKER 0x1 static void __iomem *rtc_base; #define rtc_read(addr) readb(rtc_base + (addr)) #define rtc_write(val, addr) writeb(val, rtc_base + (addr)) #define rtc_writel(val, addr) writel(val, rtc_base + (addr)) /* we rely on the rtc framework to handle locking (rtc->ops_lock), * so the only other requirement is that register accesses which * require BUSY to be clear are made with IRQs locally disabled */ static void rtc_wait_not_busy(void) { int count = 0; u8 status; /* BUSY may stay active for 1/32768 second (~30 usec) */ for (count = 0; count < 50; count++) { status = rtc_read(OMAP_RTC_STATUS_REG); if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0) break; udelay(1); } /* now we have ~15 usec to read/write various registers */ } static irqreturn_t rtc_irq(int irq, void *rtc) { unsigned long events = 0; u8 irq_data; irq_data = rtc_read(OMAP_RTC_STATUS_REG); /* alarm irq? */ if (irq_data & OMAP_RTC_STATUS_ALARM) { rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); events |= RTC_IRQF | RTC_AF; } /* 1/sec periodic/update irq? */ if (irq_data & OMAP_RTC_STATUS_1S_EVENT) events |= RTC_IRQF | RTC_UF; rtc_update_irq(rtc, 1, events); return IRQ_HANDLED; } static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) { u8 reg; local_irq_disable(); rtc_wait_not_busy(); reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); if (enabled) reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; else reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; rtc_wait_not_busy(); rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); local_irq_enable(); return 0; } /* this hardware doesn't support "don't care" alarm fields */ static int tm2bcd(struct rtc_time *tm) { if (rtc_valid_tm(tm) != 0) return -EINVAL; tm->tm_sec = bin2bcd(tm->tm_sec); tm->tm_min = bin2bcd(tm->tm_min); tm->tm_hour = bin2bcd(tm->tm_hour); tm->tm_mday = bin2bcd(tm->tm_mday); tm->tm_mon = bin2bcd(tm->tm_mon + 1); /* epoch == 1900 */ if (tm->tm_year < 100 || tm->tm_year > 199) return -EINVAL; tm->tm_year = bin2bcd(tm->tm_year - 100); return 0; } static void bcd2tm(struct rtc_time *tm) { tm->tm_sec = bcd2bin(tm->tm_sec); tm->tm_min = bcd2bin(tm->tm_min); tm->tm_hour = bcd2bin(tm->tm_hour); tm->tm_mday = bcd2bin(tm->tm_mday); tm->tm_mon = bcd2bin(tm->tm_mon) - 1; /* epoch == 1900 */ tm->tm_year = bcd2bin(tm->tm_year) + 100; } static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm) { /* we don't report wday/yday/isdst ... */ local_irq_disable(); rtc_wait_not_busy(); tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG); tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG); tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG); tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG); tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG); tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG); local_irq_enable(); bcd2tm(tm); return 0; } static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm) { if (tm2bcd(tm) < 0) return -EINVAL; local_irq_disable(); rtc_wait_not_busy(); rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG); rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG); rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG); rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG); rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG); rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG); local_irq_enable(); return 0; } static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) { local_irq_disable(); rtc_wait_not_busy(); alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG); alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG); alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG); alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG); alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG); alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG); local_irq_enable(); bcd2tm(&alm->time); alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG) & OMAP_RTC_INTERRUPTS_IT_ALARM); return 0; } static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) { u8 reg; if (tm2bcd(&alm->time) < 0) return -EINVAL; local_irq_disable(); rtc_wait_not_busy(); rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG); rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG); rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG); rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG); rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG); rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG); reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); if (alm->enabled) reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; else reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); local_irq_enable(); return 0; } static struct rtc_class_ops omap_rtc_ops = { .read_time = omap_rtc_read_time, .set_time = omap_rtc_set_time, .read_alarm = omap_rtc_read_alarm, .set_alarm = omap_rtc_set_alarm, .alarm_irq_enable = omap_rtc_alarm_irq_enable, }; static int omap_rtc_alarm; static int omap_rtc_timer; #define OMAP_RTC_DATA_DA830_IDX 1 static struct platform_device_id omap_rtc_devtype[] = { { .name = DRIVER_NAME, }, { .name = "da830-rtc", .driver_data = OMAP_RTC_HAS_KICKER, }, {}, }; MODULE_DEVICE_TABLE(platform, omap_rtc_devtype); static const struct of_device_id omap_rtc_of_match[] = { { .compatible = "ti,da830-rtc", .data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX], }, {}, }; MODULE_DEVICE_TABLE(of, omap_rtc_of_match); static int __init omap_rtc_probe(struct platform_device *pdev) { struct resource *res; struct rtc_device *rtc; u8 reg, new_ctrl; const struct platform_device_id *id_entry; const struct of_device_id *of_id; of_id = of_match_device(omap_rtc_of_match, &pdev->dev); if (of_id) pdev->id_entry = of_id->data; omap_rtc_timer = platform_get_irq(pdev, 0); if (omap_rtc_timer <= 0) { pr_debug("%s: no update irq?\n", pdev->name); return -ENOENT; } omap_rtc_alarm = platform_get_irq(pdev, 1); if (omap_rtc_alarm <= 0) { pr_debug("%s: no alarm irq?\n", pdev->name); return -ENOENT; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); rtc_base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(rtc_base)) return PTR_ERR(rtc_base); /* Enable the clock/module so that we can access the registers */ pm_runtime_enable(&pdev->dev); pm_runtime_get_sync(&pdev->dev); id_entry = platform_get_device_id(pdev); if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) { rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG); rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG); } rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &omap_rtc_ops, THIS_MODULE); if (IS_ERR(rtc)) { pr_debug("%s: can't register RTC device, err %ld\n", pdev->name, PTR_ERR(rtc)); goto fail0; } platform_set_drvdata(pdev, rtc); /* clear pending irqs, and set 1/second periodic, * which we'll use instead of update irqs */ rtc_write(0, OMAP_RTC_INTERRUPTS_REG); /* clear old status */ reg = rtc_read(OMAP_RTC_STATUS_REG); if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) { pr_info("%s: RTC power up reset detected\n", pdev->name); rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG); } if (reg & (u8) OMAP_RTC_STATUS_ALARM) rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); /* handle periodic and alarm irqs */ if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0, dev_name(&rtc->dev), rtc)) { pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", pdev->name, omap_rtc_timer); goto fail0; } if ((omap_rtc_timer != omap_rtc_alarm) && (devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0, dev_name(&rtc->dev), rtc))) { pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", pdev->name, omap_rtc_alarm); goto fail0; } /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ reg = rtc_read(OMAP_RTC_CTRL_REG); if (reg & (u8) OMAP_RTC_CTRL_STOP) pr_info("%s: already running\n", pdev->name); /* force to 24 hour mode */ new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP); new_ctrl |= OMAP_RTC_CTRL_STOP; /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: * * - Device wake-up capability setting should come through chip * init logic. OMAP1 boards should initialize the "wakeup capable" * flag in the platform device if the board is wired right for * being woken up by RTC alarm. For OMAP-L138, this capability * is built into the SoC by the "Deep Sleep" capability. * * - Boards wired so RTC_ON_nOFF is used as the reset signal, * rather than nPWRON_RESET, should forcibly enable split * power mode. (Some chip errata report that RTC_CTRL_SPLIT * is write-only, and always reads as zero...) */ if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) pr_info("%s: split power mode\n", pdev->name); if (reg != new_ctrl) rtc_write(new_ctrl, OMAP_RTC_CTRL_REG); return 0; fail0: if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) rtc_writel(0, OMAP_RTC_KICK0_REG); pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); return -EIO; } static int __exit omap_rtc_remove(struct platform_device *pdev) { const struct platform_device_id *id_entry = platform_get_device_id(pdev); device_init_wakeup(&pdev->dev, 0); /* leave rtc running, but disable irqs */ rtc_write(0, OMAP_RTC_INTERRUPTS_REG); if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) rtc_writel(0, OMAP_RTC_KICK0_REG); /* Disable the clock/module */ pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); return 0; } #ifdef CONFIG_PM_SLEEP static u8 irqstat; static int omap_rtc_suspend(struct device *dev) { irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG); /* FIXME the RTC alarm is not currently acting as a wakeup event * source, and in fact this enable() call is just saving a flag * that's never used... */ if (device_may_wakeup(dev)) enable_irq_wake(omap_rtc_alarm); else rtc_write(0, OMAP_RTC_INTERRUPTS_REG); /* Disable the clock/module */ pm_runtime_put_sync(dev); return 0; } static int omap_rtc_resume(struct device *dev) { /* Enable the clock/module so that we can access the registers */ pm_runtime_get_sync(dev); if (device_may_wakeup(dev)) disable_irq_wake(omap_rtc_alarm); else rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); return 0; } #endif static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume); static void omap_rtc_shutdown(struct platform_device *pdev) { rtc_write(0, OMAP_RTC_INTERRUPTS_REG); } MODULE_ALIAS("platform:omap_rtc"); static struct platform_driver omap_rtc_driver = { .remove = __exit_p(omap_rtc_remove), .shutdown = omap_rtc_shutdown, .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, .pm = &omap_rtc_pm_ops, .of_match_table = of_match_ptr(omap_rtc_of_match), }, .id_table = omap_rtc_devtype, }; module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe); MODULE_AUTHOR("George G. Davis (and others)"); MODULE_LICENSE("GPL"); |