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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 | /* * Device Tree Source for ESTeem 195E Hotfoot * * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without * any warranty of any kind, whether express or implied. */ /dts-v1/; / { #address-cells = <1>; #size-cells = <1>; model = "est,hotfoot"; compatible = "est,hotfoot"; dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; ethernet1 = &EMAC1; serial0 = &UART0; serial1 = &UART1; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; model = "PowerPC,405EP"; reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ i-cache-line-size = <0x20>; d-cache-line-size = <0x20>; i-cache-size = <0x4000>; d-cache-size = <0x4000>; dcr-controller; dcr-access-method = "native"; }; }; memory { device_type = "memory"; reg = <0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller { compatible = "ibm,uic"; interrupt-controller; cell-index = <0>; dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; }; plb { compatible = "ibm,plb3"; #address-cells = <1>; #size-cells = <1>; ranges; clock-frequency = <0>; /* Filled in by zImage */ SDRAM0: memory-controller { compatible = "ibm,sdram-405ep"; dcr-reg = <0x010 0x002>; }; MAL: mcmal { compatible = "ibm,mcmal-405ep", "ibm,mcmal"; dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <2>; interrupt-parent = <&UIC0>; interrupts = < 0xb 0x4 /* TXEOB */ 0xc 0x4 /* RXEOB */ 0xa 0x4 /* SERR */ 0xd 0x4 /* TXDE */ 0xe 0x4 /* RXDE */>; }; POB0: opb { compatible = "ibm,opb-405ep", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; ranges = <0xef600000 0xef600000 0x00a00000>; dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by zImage */ /* Hotfoot has UART0/UART1 swapped */ UART0: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; reg = <0xef600400 0x00000008>; virtual-reg = <0xef600400>; clock-frequency = <0>; /* Filled in by zImage */ current-speed = <0x9600>; interrupt-parent = <&UIC0>; interrupts = <0x1 0x4>; }; UART1: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; reg = <0xef600300 0x00000008>; virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ current-speed = <0x9600>; interrupt-parent = <&UIC0>; interrupts = <0x0 0x4>; }; IIC: i2c@ef600500 { compatible = "ibm,iic-405ep", "ibm,iic"; reg = <0xef600500 0x00000011>; interrupt-parent = <&UIC0>; interrupts = <0x2 0x4>; rtc@68 { /* Actually a DS1339 */ compatible = "dallas,ds1307"; reg = <0x68>; }; temp@4a { /* Not present on all boards */ compatible = "national,lm75"; reg = <0x4a>; }; }; GPIO: gpio@ef600700 { #gpio-cells = <2>; compatible = "ibm,ppc4xx-gpio"; reg = <0xef600700 0x00000020>; gpio-controller; }; gpio-leds { compatible = "gpio-leds"; status { label = "Status"; gpios = <&GPIO 1 0>; }; radiorx { label = "Rx"; gpios = <&GPIO 0xe 0>; }; }; EMAC0: ethernet@ef600800 { linux,network-index = <0x0>; device_type = "network"; compatible = "ibm,emac-405ep", "ibm,emac"; interrupt-parent = <&UIC0>; interrupts = < 0xf 0x4 /* Ethernet */ 0x9 0x4 /* Ethernet Wake Up */>; local-mac-address = [000000000000]; /* Filled in by zImage */ reg = <0xef600800 0x00000070>; mal-device = <&MAL>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; max-frame-size = <0x5dc>; rx-fifo-size = <0x1000>; tx-fifo-size = <0x800>; phy-mode = "mii"; phy-map = <0x00000000>; }; EMAC1: ethernet@ef600900 { linux,network-index = <0x1>; device_type = "network"; compatible = "ibm,emac-405ep", "ibm,emac"; interrupt-parent = <&UIC0>; interrupts = < 0x11 0x4 /* Ethernet */ 0x9 0x4 /* Ethernet Wake Up */>; local-mac-address = [000000000000]; /* Filled in by zImage */ reg = <0xef600900 0x00000070>; mal-device = <&MAL>; mal-tx-channel = <2>; mal-rx-channel = <1>; cell-index = <1>; max-frame-size = <0x5dc>; rx-fifo-size = <0x1000>; tx-fifo-size = <0x800>; mdio-device = <&EMAC0>; phy-mode = "mii"; phy-map = <0x0000001>; }; }; EBC0: ebc { compatible = "ibm,ebc-405ep", "ibm,ebc"; dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; /* The ranges property is supplied by the bootwrapper * and is based on the firmware's configuration of the * EBC bridge */ clock-frequency = <0>; /* Filled in by zImage */ nor_flash@0 { compatible = "cfi-flash"; bank-width = <2>; reg = <0x0 0xff800000 0x00800000>; #address-cells = <1>; #size-cells = <1>; /* This mapping is for the 8M flash 4M flash has all ofssets -= 4M, and FeatFS partition is not present */ partition@0 { label = "Bootloader"; reg = <0x7c0000 0x40000>; /* read-only; */ }; partition@1 { label = "Env_and_Config_Primary"; reg = <0x400000 0x10000>; }; partition@2 { label = "Kernel"; reg = <0x420000 0x100000>; }; partition@3 { label = "Filesystem"; reg = <0x520000 0x2a0000>; }; partition@4 { label = "Env_and_Config_Secondary"; reg = <0x410000 0x10000>; }; partition@5 { label = "FeatFS"; reg = <0x000000 0x400000>; }; partition@6 { label = "Bootloader_Env"; reg = <0x7d0000 0x10000>; }; }; }; PCI0: pci@ec000000 { device_type = "pci"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; compatible = "ibm,plb405ep-pci", "ibm,plb-pci"; primary; reg = <0xeec00000 0x00000008 /* Config space access */ 0xeed80000 0x00000004 /* IACK */ 0xeed80000 0x00000004 /* Special cycle */ 0xef480000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; interrupt-parent = <&UIC0>; interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */ 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */ 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8 >; }; }; chosen { linux,stdout-path = &UART0; }; }; |