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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 | /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/delay.h> #include <linux/bootmem.h> #include <linux/ioport.h> #include <linux/pm.h> #include <asm/bootinfo.h> #include <asm/time.h> #include <asm/reboot.h> #include <asm/cacheflush.h> #include <bcm63xx_board.h> #include <bcm63xx_cpu.h> #include <bcm63xx_regs.h> #include <bcm63xx_io.h> void bcm63xx_machine_halt(void) { printk(KERN_INFO "System halted\n"); while (1) ; } static void bcm6348_a1_reboot(void) { u32 reg; /* soft reset all blocks */ printk(KERN_INFO "soft-reseting all blocks ...\n"); reg = bcm_perf_readl(PERF_SOFTRESET_REG); reg &= ~SOFTRESET_6348_ALL; bcm_perf_writel(reg, PERF_SOFTRESET_REG); mdelay(10); reg = bcm_perf_readl(PERF_SOFTRESET_REG); reg |= SOFTRESET_6348_ALL; bcm_perf_writel(reg, PERF_SOFTRESET_REG); mdelay(10); /* Jump to the power on address. */ printk(KERN_INFO "jumping to reset vector.\n"); /* set high vectors (base at 0xbfc00000 */ set_c0_status(ST0_BEV | ST0_ERL); /* run uncached in kseg0 */ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); __flush_cache_all(); /* remove all wired TLB entries */ write_c0_wired(0); __asm__ __volatile__( "jr\t%0" : : "r" (0xbfc00000)); while (1) ; } void bcm63xx_machine_reboot(void) { u32 reg; /* mask and clear all external irq */ reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg &= ~EXTIRQ_CFG_MASK_ALL; reg |= EXTIRQ_CFG_CLEAR_ALL; bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1)) bcm6348_a1_reboot(); printk(KERN_INFO "triggering watchdog soft-reset...\n"); reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); reg |= SYS_PLL_SOFT_RESET; bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); while (1) ; } static void __bcm63xx_machine_reboot(char *p) { bcm63xx_machine_reboot(); } /* * return system type in /proc/cpuinfo */ const char *get_system_type(void) { static char buf[128]; snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)", board_get_name(), bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); return buf; } void __init plat_time_init(void) { mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2; } void __init plat_mem_setup(void) { add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM); _machine_halt = bcm63xx_machine_halt; _machine_restart = __bcm63xx_machine_reboot; pm_power_off = bcm63xx_machine_halt; set_io_port_base(0); ioport_resource.start = 0; ioport_resource.end = ~0; board_setup(); } int __init bcm63xx_register_devices(void) { return board_register_devices(); } arch_initcall(bcm63xx_register_devices); |