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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 | /* * include/asm-s390/sigp.h * * S390 version * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), * Martin Schwidefsky (schwidefsky@de.ibm.com) * Heiko Carstens (heiko.carstens@de.ibm.com) * * sigp.h by D.J. Barrow (c) IBM 1999 * contains routines / structures for signalling other S/390 processors in an * SMP configuration. */ #ifndef __SIGP__ #define __SIGP__ #include <asm/ptrace.h> #include <asm/atomic.h> /* get real cpu address from logical cpu number */ extern volatile int __cpu_logical_map[]; typedef enum { sigp_unassigned=0x0, sigp_sense, sigp_external_call, sigp_emergency_signal, sigp_start, sigp_stop, sigp_restart, sigp_unassigned1, sigp_unassigned2, sigp_stop_and_store_status, sigp_unassigned3, sigp_initial_cpu_reset, sigp_cpu_reset, sigp_set_prefix, sigp_store_status_at_address, sigp_store_extended_status_at_address } sigp_order_code; typedef __u32 sigp_status_word; typedef enum { sigp_order_code_accepted=0, sigp_status_stored, sigp_busy, sigp_not_operational } sigp_ccode; /* * Definitions for the external call */ /* 'Bit' signals, asynchronous */ typedef enum { ec_schedule=0, ec_call_function, ec_bit_last } ec_bit_sig; /* * Signal processor */ static inline sigp_ccode signal_processor(__u16 cpu_addr, sigp_order_code order_code) { register unsigned long reg1 asm ("1") = 0; sigp_ccode ccode; asm volatile( " sigp %1,%2,0(%3)\n" " ipm %0\n" " srl %0,28\n" : "=d" (ccode) : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]), "a" (order_code) : "cc" , "memory"); return ccode; } /* * Signal processor with parameter */ static inline sigp_ccode signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code) { register unsigned int reg1 asm ("1") = parameter; sigp_ccode ccode; asm volatile( " sigp %1,%2,0(%3)\n" " ipm %0\n" " srl %0,28\n" : "=d" (ccode) : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]), "a" (order_code) : "cc" , "memory"); return ccode; } /* * Signal processor with parameter and return status */ static inline sigp_ccode signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr, sigp_order_code order_code) { register unsigned int reg1 asm ("1") = parameter; sigp_ccode ccode; asm volatile( " sigp %1,%2,0(%3)\n" " ipm %0\n" " srl %0,28\n" : "=d" (ccode), "+d" (reg1) : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code) : "cc" , "memory"); *statusptr = reg1; return ccode; } #endif /* __SIGP__ */ |