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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 | /* * Code to handle Baget/MIPS IRQs plus some generic interrupt stuff. * * Copyright (C) 1998 Vladimir Roganov & Gleb Raiko * Code (mostly sleleton and comments) derived from DECstation IRQ * handling. */ #include <linux/errno.h> #include <linux/init.h> #include <linux/kernel_stat.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/types.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/timex.h> #include <linux/slab.h> #include <linux/random.h> #include <linux/delay.h> #include <linux/seq_file.h> #include <asm/bitops.h> #include <asm/bootinfo.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/mipsregs.h> #include <asm/system.h> #include <asm/baget/baget.h> unsigned long spurious_count = 0; /* * This table is a correspondence between IRQ numbers and CPU PILs */ static int irq_to_pil_map[BAGET_IRQ_NR] = { 7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */ -1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */ -1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */ -1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 /* 0x30 - 0x3f */ }; static inline int irq_to_pil(int irq_nr) { int pil = -1; if (irq_nr >= BAGET_IRQ_NR) baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr); else { pil = irq_to_pil_map[irq_nr]; if (pil == -1) baget_printk("irq_to_pil: unknown irq = 0x%x\n", irq_nr); } return pil; } /* Function for careful CP0 interrupt mask access */ static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask) { unsigned long status = read_32bit_cp0_register(CP0_STATUS); status &= ~((clr_mask & 0xFF) << 8); status |= (set_mask & 0xFF) << 8; write_32bit_cp0_register(CP0_STATUS, status); } /* * These two functions may be used for unconditional IRQ * masking via their PIL protection. */ static inline void mask_irq(unsigned int irq_nr) { modify_cp0_intmask(irq_to_pil(irq_nr), 0); } static inline void unmask_irq(unsigned int irq_nr) { modify_cp0_intmask(0, irq_to_pil(irq_nr)); } /* * The following section is introduced for masking/unasking IRQ * only while no more IRQs uses same CPU PIL. * * These functions are used in request_irq, free_irq, but it looks * they cannot change something: CP0_STATUS is private for any * process, and their action is invisible for system. */ static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, }; void mask_irq_count(int irq_nr) { unsigned long flags; int pil = irq_to_pil(irq_nr); save_and_cli(flags); if (!--pil_in_use[pil]) mask_irq(irq_nr); restore_flags(flags); } void unmask_irq_count(int irq_nr) { unsigned long flags; int pil = irq_to_pil(irq_nr); save_and_cli(flags); if (!pil_in_use[pil]++) unmask_irq(irq_nr); restore_flags(flags); } /* * Two functions below are exported versions of mask/unmask IRQ */ void disable_irq(unsigned int irq_nr) { unsigned long flags; save_and_cli(flags); mask_irq(irq_nr); restore_flags(flags); } void enable_irq(unsigned int irq_nr) { unsigned long flags; save_and_cli(flags); unmask_irq(irq_nr); restore_flags(flags); } /* * Pointers to the low-level handlers: first the general ones, then the * fast ones, then the bad ones. */ static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, }; int show_interrupts(struct seq_file *p, void *v) { int i; struct irqaction * action; for (i = 0 ; i < BAGET_IRQ_NR ; i++) { action = irq_action[i]; if (!action) continue; seq_printf(p, "%2d: %8d %c %s", i, kstat.irqs[0][i], (action->flags & SA_INTERRUPT) ? '+' : ' ', action->name); for (action=action->next; action; action = action->next) { seq_printf(p, ",%s %s", (action->flags & SA_INTERRUPT) ? " +" : "", action->name); } seq_putc(p, '\n'); } return 0; } /* * do_IRQ handles IRQ's that have been installed without the * SA_INTERRUPT flag: it uses the full signal-handling return * and runs with other interrupts enabled. All relatively slow * IRQ's should use this format: notably the keyboard/timer * routines. */ static void do_IRQ(int irq, struct pt_regs * regs) { struct irqaction *action; int do_random, cpu; cpu = smp_processor_id(); irq_enter(cpu, irq); kstat.irqs[cpu][irq]++; mask_irq(irq); action = *(irq + irq_action); if (action) { if (!(action->flags & SA_INTERRUPT)) local_irq_enable(); action = *(irq + irq_action); do_random = 0; do { do_random |= action->flags; action->handler(irq, action->dev_id, regs); action = action->next; } while (action); if (do_random & SA_SAMPLE_RANDOM) add_interrupt_randomness(irq); local_irq_disable(); } else { printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq); } unmask_irq(irq); irq_exit(cpu, irq); /* unmasking and bottom half handling is done magically for us. */ } /* * What to do in case of 'no VIC register available' for current interrupt */ static void vic_reg_error(unsigned long address, unsigned char active_pils) { printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n" "Current interrupt mask from CP0_CAUSE: %02x\n", address, 0xff & active_pils, 0xff & (read_32bit_cp0_register(CP0_CAUSE)>>8)); { int i; for (i=0; i<10000; i++) udelay(1000); } } static char baget_fpu_irq = BAGET_FPU_IRQ; #define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1} /* * Main interrupt handler: interrupt demultiplexer */ asmlinkage void baget_interrupt(struct pt_regs *regs) { static struct baget_int_reg int_reg[BAGET_PIL_NR] = { BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK, BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK }; unsigned char active_pils; while ((active_pils = read_32bit_cp0_register(CP0_CAUSE)>>8)) { int pil; struct baget_int_reg* reg; for (pil = 0; pil < BAGET_PIL_NR; pil++) { if (!(active_pils & (1<<pil))) continue; reg = &int_reg[pil]; if (reg->address) { extern int try_read(unsigned long,int); int irq = try_read(reg->address, reg->size); if (irq != -1) do_IRQ(BAGET_IRQ_MASK(irq), regs); else vic_reg_error(reg->address, active_pils); } else { printk("baget_interrupt: unknown interrupt " "(pil = %d)\n", pil); } } } } /* * Idea is to put all interrupts * in a single table and differenciate them just by number. */ int setup_baget_irq(int irq, struct irqaction * new) { int shared = 0; struct irqaction *old, **p; unsigned long flags; p = irq_action + irq; if ((old = *p) != NULL) { /* Can't share interrupts unless both agree to */ if (!(old->flags & new->flags & SA_SHIRQ)) return -EBUSY; /* Can't share interrupts unless both are same type */ if ((old->flags ^ new->flags) & SA_INTERRUPT) return -EBUSY; /* add new interrupt at end of irq queue */ do { p = &old->next; old = *p; } while (old); shared = 1; } if (new->flags & SA_SAMPLE_RANDOM) rand_initialize_irq(irq); save_and_cli(flags); *p = new; restore_flags(flags); if (!shared) { unmask_irq_count(irq); } return 0; } int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long irqflags, const char * devname, void *dev_id) { int retval; struct irqaction * action; if (irq >= BAGET_IRQ_NR) return -EINVAL; if (!handler) return -EINVAL; if (irq_to_pil_map[irq] < 0) return -EINVAL; action = (struct irqaction *) kmalloc(sizeof(struct irqaction), GFP_KERNEL); if (!action) return -ENOMEM; action->handler = handler; action->flags = irqflags; action->mask = 0; action->name = devname; action->next = NULL; action->dev_id = dev_id; retval = setup_baget_irq(irq, action); if (retval) kfree(action); return retval; } void free_irq(unsigned int irq, void *dev_id) { struct irqaction * action, **p; unsigned long flags; if (irq >= BAGET_IRQ_NR) printk("Trying to free IRQ%d\n",irq); for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) { if (action->dev_id != dev_id) continue; /* Found it - now free it */ save_and_cli(flags); *p = action->next; if (!irq[irq_action]) unmask_irq_count(irq); restore_flags(flags); kfree(action); return; } printk("Trying to free free IRQ%d\n",irq); } unsigned long probe_irq_on (void) { /* TODO */ return 0; } int probe_irq_off (unsigned long irqs) { /* TODO */ return 0; } static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs) { *(volatile char*) BAGET_WRERR_ACK = 0; } static struct irqaction irq0 = { write_err_interrupt, SA_INTERRUPT, 0, "bus write error", NULL, NULL}; void __init init_IRQ(void) { irq_setup(); /* Enable access to VIC interrupt registers */ vac_outw(0xacef | 0x8200, VAC_PIO_FUNC); /* Enable interrupts for pils 2 and 3 (lines 0 and 1) */ modify_cp0_intmask(0, (1<<2)|(1<<3)); if (setup_baget_irq(0, &irq0) < 0) printk("init_IRQ: unable to register write_err irq\n"); } |