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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 | /* * linux/include/asm-arm/arch-rpc/irq.h * * Copyright (C) 1996 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * Changelog: * 10-10-1996 RMK Brought up to date with arch-sa110eval * 22-08-1998 RMK Restructured IRQ routines */ #include <asm/hardware/iomd.h> #include <asm/io.h> #define fixup_irq(x) (x) static void rpc_mask_irq_ack_a(unsigned int irq) { unsigned int val, mask; mask = 1 << irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val & ~mask, IOMD_IRQMASKA); iomd_writeb(mask, IOMD_IRQCLRA); } static void rpc_mask_irq_a(unsigned int irq) { unsigned int val, mask; mask = 1 << irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val & ~mask, IOMD_IRQMASKA); } static void rpc_unmask_irq_a(unsigned int irq) { unsigned int val, mask; mask = 1 << irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val | mask, IOMD_IRQMASKA); } static void rpc_mask_irq_b(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKB); iomd_writeb(val & ~mask, IOMD_IRQMASKB); } static void rpc_unmask_irq_b(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKB); iomd_writeb(val | mask, IOMD_IRQMASKB); } static void rpc_mask_irq_c(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKC); iomd_writeb(val & ~mask, IOMD_IRQMASKC); } static void rpc_unmask_irq_c(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKC); iomd_writeb(val | mask, IOMD_IRQMASKC); } static void rpc_mask_irq_d(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKD); iomd_writeb(val & ~mask, IOMD_IRQMASKD); } static void rpc_unmask_irq_d(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_IRQMASKD); iomd_writeb(val | mask, IOMD_IRQMASKD); } static void rpc_mask_irq_dma(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_DMAMASK); iomd_writeb(val & ~mask, IOMD_DMAMASK); } static void rpc_unmask_irq_dma(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_DMAMASK); iomd_writeb(val | mask, IOMD_DMAMASK); } static void rpc_mask_irq_fiq(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val & ~mask, IOMD_FIQMASK); } static void rpc_unmask_irq_fiq(unsigned int irq) { unsigned int val, mask; mask = 1 << (irq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val | mask, IOMD_FIQMASK); } static __inline__ void irq_init_irq(void) { int irq; iomd_writeb(0, IOMD_IRQMASKA); iomd_writeb(0, IOMD_IRQMASKB); iomd_writeb(0, IOMD_IRQMASKC); iomd_writeb(0, IOMD_IRQMASKD); iomd_writeb(0xff, IOMD_IOLINES); iomd_writeb(0, IOMD_FIQMASK); iomd_writeb(0, IOMD_DMAMASK); for (irq = 0; irq < NR_IRQS; irq++) { switch (irq) { case 0 ... 6: irq_desc[irq].probe_ok = 1; case 7: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_ack_a; irq_desc[irq].mask = rpc_mask_irq_a; irq_desc[irq].unmask = rpc_unmask_irq_a; break; case 9 ... 15: irq_desc[irq].probe_ok = 1; case 8: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_b; irq_desc[irq].mask = rpc_mask_irq_b; irq_desc[irq].unmask = rpc_unmask_irq_b; break; case 16 ... 19: case 21: irq_desc[irq].noautoenable = 1; case 20: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_dma; irq_desc[irq].mask = rpc_mask_irq_dma; irq_desc[irq].unmask = rpc_unmask_irq_dma; break; case 24 ... 31: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_c; irq_desc[irq].mask = rpc_mask_irq_c; irq_desc[irq].unmask = rpc_unmask_irq_c; break; case 40 ... 47: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_d; irq_desc[irq].mask = rpc_mask_irq_d; irq_desc[irq].unmask = rpc_unmask_irq_d; break; case 64 ... 71: irq_desc[irq].valid = 1; irq_desc[irq].mask_ack = rpc_mask_irq_fiq; irq_desc[irq].mask = rpc_mask_irq_fiq; irq_desc[irq].unmask = rpc_unmask_irq_fiq; break; } } irq_desc[IRQ_KEYBOARDTX].noautoenable = 1; init_FIQ(); } |