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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 | /* * linux/arch/arm/lib/io-readsw-armv3.S * * Copyright (C) 1995-2000 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/hardware.h> .insw_bad_alignment: adr r0, .insw_bad_align_msg mov r2, lr b SYMBOL_NAME(panic) .insw_bad_align_msg: .asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n" .align .insw_align: tst r1, #1 bne .insw_bad_alignment ldr r3, [r0] strb r3, [r1], #1 mov r3, r3, lsr #8 strb r3, [r1], #1 subs r2, r2, #1 RETINSTR(moveq, pc, lr) ENTRY(__raw_readsw) teq r2, #0 @ do we have to check for the zero len? moveq pc, lr tst r1, #3 bne .insw_align .insw_aligned: mov ip, #0xff orr ip, ip, ip, lsl #8 stmfd sp!, {r4, r5, r6, lr} subs r2, r2, #8 bmi .no_insw_8 .insw_8_lp: ldr r3, [r0] and r3, r3, ip ldr r4, [r0] orr r3, r3, r4, lsl #16 ldr r4, [r0] and r4, r4, ip ldr r5, [r0] orr r4, r4, r5, lsl #16 ldr r5, [r0] and r5, r5, ip ldr r6, [r0] orr r5, r5, r6, lsl #16 ldr r6, [r0] and r6, r6, ip ldr lr, [r0] orr r6, r6, lr, lsl #16 stmia r1!, {r3 - r6} subs r2, r2, #8 bpl .insw_8_lp tst r2, #7 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) .no_insw_8: tst r2, #4 beq .no_insw_4 ldr r3, [r0] and r3, r3, ip ldr r4, [r0] orr r3, r3, r4, lsl #16 ldr r4, [r0] and r4, r4, ip ldr r5, [r0] orr r4, r4, r5, lsl #16 stmia r1!, {r3, r4} .no_insw_4: tst r2, #2 beq .no_insw_2 ldr r3, [r0] and r3, r3, ip ldr r4, [r0] orr r3, r3, r4, lsl #16 str r3, [r1], #4 .no_insw_2: tst r2, #1 ldrne r3, [r0] strneb r3, [r1], #1 movne r3, r3, lsr #8 strneb r3, [r1] LOADREGS(fd, sp!, {r4, r5, r6, pc}) |