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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 | /* * fp_cond.S * * Copyright Roman Zippel, 1997. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, and the entire permission notice in its entirety, * including the disclaimer of warranties. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * ALTERNATIVELY, this product may be distributed under the terms of * the GNU General Public License, in which case the provisions of the GPL are * required INSTEAD OF the above restrictions. (This clause is * necessary due to a potential bad interaction between the GPL and * the restrictions contained in a BSD-style copyright.) * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "fp_emu.h" #include "fp_decode.h" .globl fp_fscc, fp_fbccw, fp_fbccl #ifdef FPU_EMU_DEBUG fp_fnop: printf PDECODE,"fnop\n" jra fp_end #else #define fp_fnop fp_end #endif fp_fbccw: tst.w %d2 jeq fp_fnop printf PDECODE,"fbccw " fp_get_pc %a0 lea (-2,%a0,%d2.w),%a0 jra 1f fp_fbccl: printf PDECODE,"fbccl " fp_get_pc %a0 move.l %d2,%d0 swap %d0 fp_get_instr_word %d0,fp_err_ua1 lea (-2,%a0,%d0.l),%a0 1: printf PDECODE,"%x",1,%a0 move.l %d2,%d0 swap %d0 jsr fp_compute_cond tst.l %d0 jeq 1f fp_put_pc %a0,1 1: printf PDECODE,"\n" jra fp_end fp_fdbcc: printf PDECODE,"fdbcc " fp_get_pc %a1 | calculate new pc fp_get_instr_word %d0,fp_err_ua1 add.w %d0,%a1 fp_decode_addr_reg printf PDECODE,"d%d,%x\n",2,%d0,%a1 swap %d1 | test condition in %d1 tst.w %d1 jne 2f move.l %d0,%d1 jsr fp_get_data_reg subq.w #1,%d0 jcs 1f fp_put_pc %a1,1 1: jsr fp_put_data_reg 2: jra fp_end | set flags for decode macros for fs<cc> do_fscc=1 do_no_pc_mode=1 fp_fscc: printf PDECODE,"fscc " move.l %d2,%d0 jsr fp_compute_cond move.w %d0,%d1 swap %d1 | decode addressing mode fp_decode_addr_mode .long fp_data, fp_fdbcc .long fp_indirect, fp_postinc .long fp_predecr, fp_disp16 .long fp_extmode0, fp_extmode1 | addressing mode: data register direct fp_data: fp_mode_data_direct move.w %d0,%d1 | save register nr jsr fp_get_data_reg swap %d1 move.b %d1,%d0 swap %d1 jsr fp_put_data_reg printf PDECODE,"\n" jra fp_end fp_indirect: fp_mode_addr_indirect jra fp_do_scc fp_postinc: fp_mode_addr_indirect_postinc jra fp_do_scc fp_predecr: fp_mode_addr_indirect_predec jra fp_do_scc fp_disp16: fp_mode_addr_indirect_disp16 jra fp_do_scc fp_extmode0: fp_mode_addr_indirect_extmode0 jra fp_do_scc fp_extmode1: bfextu %d2{#13,#3},%d0 jmp ([0f:w,%pc,%d0*4]) .align 4 0: .long fp_absolute_short, fp_absolute_long .long fp_ill, fp_ill | NOTE: jump here to ftrap.x .long fp_ill, fp_ill .long fp_ill, fp_ill fp_absolute_short: fp_mode_abs_short jra fp_do_scc fp_absolute_long: fp_mode_abs_long | jra fp_do_scc fp_do_scc: swap %d1 putuser.b %d1,(%a0),fp_err_ua1,%a0 printf PDECODE,"\n" jra fp_end #define tst_NAN btst #24,%d1 #define tst_Z btst #26,%d1 #define tst_N btst #27,%d1 fp_compute_cond: move.l (FPD_FPSR,FPDATA),%d1 btst #4,%d0 jeq 1f tst_NAN jeq 1f bset #15,%d1 bset #7,%d1 move.l %d1,(FPD_FPSR,FPDATA) 1: and.w #0xf,%d0 jmp ([0f:w,%pc,%d0.w*4]) .align 4 0: .long fp_f , fp_eq , fp_ogt, fp_oge .long fp_olt, fp_ole, fp_ogl, fp_or .long fp_un , fp_ueq, fp_ugt, fp_uge .long fp_ult, fp_ule, fp_ne , fp_t fp_f: moveq #0,%d0 rts fp_eq: moveq #0,%d0 tst_Z jeq 1f moveq #-1,%d0 1: rts fp_ogt: moveq #0,%d0 tst_NAN jne 1f tst_Z jne 1f tst_N jne 1f moveq #-1,%d0 1: rts fp_oge: moveq #-1,%d0 tst_Z jne 2f tst_NAN jne 1f tst_N jeq 2f 1: moveq #0,%d0 2: rts fp_olt: moveq #0,%d0 tst_NAN jne 1f tst_Z jne 1f tst_N jeq 1f moveq #-1,%d0 1: rts fp_ole: moveq #-1,%d0 tst_Z jne 2f tst_NAN jne 1f tst_N jne 2f 1: moveq #0,%d0 2: rts fp_ogl: moveq #0,%d0 tst_NAN jne 1f tst_Z jne 1f moveq #-1,%d0 1: rts fp_or: moveq #0,%d0 tst_NAN jne 1f moveq #-1,%d0 1: rts fp_un: moveq #0,%d0 tst_NAN jeq 1f moveq #-1,%d0 rts fp_ueq: moveq #-1,%d0 tst_NAN jne 1f tst_Z jne 1f moveq #0,%d0 1: rts fp_ugt: moveq #-1,%d0 tst_NAN jne 2f tst_N jne 1f tst_Z jeq 2f 1: moveq #0,%d0 2: rts fp_uge: moveq #-1,%d0 tst_NAN jne 1f tst_Z jne 1f tst_N jeq 1f moveq #0,%d0 1: rts fp_ult: moveq #-1,%d0 tst_NAN jne 2f tst_Z jne 1f tst_N jne 2f 1: moveq #0,%d0 2: rts fp_ule: moveq #-1,%d0 tst_NAN jne 1f tst_Z jne 1f tst_N jne 1f moveq #0,%d0 1: rts fp_ne: moveq #0,%d0 tst_Z jne 1f moveq #-1,%d0 1: rts fp_t: moveq #-1,%d0 rts |