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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 | #ifndef __ASM_ARM_DMA_H #define __ASM_ARM_DMA_H typedef unsigned int dmach_t; #include <linux/config.h> #include <linux/spinlock.h> #include <asm/system.h> #include <asm/memory.h> #include <asm/scatterlist.h> #include <asm/arch/dma.h> /* * DMA modes */ typedef unsigned int dmamode_t; #define DMA_MODE_MASK 3 #define DMA_MODE_READ 0 #define DMA_MODE_WRITE 1 #define DMA_MODE_CASCADE 2 #define DMA_AUTOINIT 4 extern spinlock_t dma_spin_lock; extern __inline__ unsigned long claim_dma_lock(void) { unsigned long flags; spin_lock_irqsave(&dma_spin_lock, flags); return flags; } extern __inline__ void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&dma_spin_lock, flags); } /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. */ #define clear_dma_ff(channel) /* Set only the page register bits of the transfer address. * * NOTE: This is an architecture specific function, and should * be hidden from the drivers */ extern void set_dma_page(dmach_t channel, char pagenr); /* Request a DMA channel * * Some architectures may need to do allocate an interrupt */ extern int request_dma(dmach_t channel, const char * device_id); /* Free a DMA channel * * Some architectures may need to do free an interrupt */ extern void free_dma(dmach_t channel); /* Enable DMA for this channel * * On some architectures, this may have other side effects like * enabling an interrupt and setting the DMA registers. */ extern void enable_dma(dmach_t channel); /* Disable DMA for this channel * * On some architectures, this may have other side effects like * disabling an interrupt or whatever. */ extern void disable_dma(dmach_t channel); /* Set the DMA scatter gather list for this channel * * This should not be called if a DMA channel is enabled, * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); /* Set the DMA address for this channel * * This should not be called if a DMA channel is enabled, * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ extern void set_dma_addr(dmach_t channel, unsigned long physaddr); /* Set the DMA byte count for this channel * * This should not be called if a DMA channel is enabled, * especially since some DMA architectures don't update the * DMA count immediately, but defer it to the enable_dma(). */ extern void set_dma_count(dmach_t channel, unsigned long count); /* Set the transfer direction for this channel * * This should not be called if a DMA channel is enabled, * especially since some DMA architectures don't update the * DMA transfer direction immediately, but defer it to the * enable_dma(). */ extern void set_dma_mode(dmach_t channel, dmamode_t mode); /* Set the transfer speed for this channel */ extern void set_dma_speed(dmach_t channel, int cycle_ns); /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is * still in progress will return unpredictable results. * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. */ extern int get_dma_residue(dmach_t channel); #ifndef NO_DMA #define NO_DMA 255 #endif #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else #define isa_dma_bridge_buggy (0) #endif #endif /* _ARM_DMA_H */ |