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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 | /* $Id: pgtsun4c.h,v 1.37 2000/06/05 06:08:46 anton Exp $ * pgtsun4c.h: Sun4c specific pgtable.h defines and code. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) */ #ifndef _SPARC_PGTSUN4C_H #define _SPARC_PGTSUN4C_H #include <asm/contregs.h> /* PMD_SHIFT determines the size of the area a second-level page table can map */ #define SUN4C_PMD_SHIFT 22 #define SUN4C_PMD_SIZE (1UL << SUN4C_PMD_SHIFT) #define SUN4C_PMD_MASK (~(SUN4C_PMD_SIZE-1)) #define SUN4C_PMD_ALIGN(addr) (((addr)+SUN4C_PMD_SIZE-1)&SUN4C_PMD_MASK) /* PGDIR_SHIFT determines what a third-level page table entry can map */ #define SUN4C_PGDIR_SHIFT 22 #define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) #define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) /* To represent how the sun4c mmu really lays things out. */ #define SUN4C_REAL_PGDIR_SHIFT 18 #define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) #define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) /* 16 bit PFN on sun4c */ #define SUN4C_PFN_MASK 0xffff /* Don't increase these unless the structures in sun4c.c are fixed */ #define SUN4C_MAX_SEGMAPS 256 #define SUN4C_MAX_CONTEXTS 16 /* * To be efficient, and not have to worry about allocating such * a huge pgd, we make the kernel sun4c tables each hold 1024 * entries and the pgd similarly just like the i386 tables. */ #define SUN4C_PTRS_PER_PTE 1024 #define SUN4C_PTRS_PER_PMD 1 #define SUN4C_PTRS_PER_PGD 1024 /* * Sparc SUN4C pte fields. */ #define _SUN4C_PAGE_VALID 0x80000000 #define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ #define _SUN4C_PAGE_DIRTY 0x40000000 #define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ #define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ #define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ #define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ #define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ #define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ #define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ #define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ #define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ #define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ _SUN4C_PAGE_ACCESSED) #define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ _SUN4C_PAGE_MODIFIED) #define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) #define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) #define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ _SUN4C_PAGE_WRITE) #define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) #define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) #ifndef __ASSEMBLY__ extern __inline__ unsigned long sun4c_get_synchronous_error(void) { unsigned long sync_err; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (sync_err) : "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); return sync_err; } extern __inline__ unsigned long sun4c_get_synchronous_address(void) { unsigned long sync_addr; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (sync_addr) : "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); return sync_addr; } /* SUN4C pte, segmap, and context manipulation */ extern __inline__ unsigned long sun4c_get_segmap(unsigned long addr) { register unsigned long entry; __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : "=r" (entry) : "r" (addr), "i" (ASI_SEGMAP)); return entry; } extern __inline__ void sun4c_put_segmap(unsigned long addr, unsigned long entry) { __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : : "r" (addr), "r" (entry), "i" (ASI_SEGMAP)); } extern __inline__ unsigned long sun4c_get_pte(unsigned long addr) { register unsigned long entry; __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : "=r" (entry) : "r" (addr), "i" (ASI_PTE)); return entry; } extern __inline__ void sun4c_put_pte(unsigned long addr, unsigned long entry) { __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : "r" (addr), "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)); } extern __inline__ int sun4c_get_context(void) { register int ctx; __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : "=r" (ctx) : "r" (AC_CONTEXT), "i" (ASI_CONTROL)); return ctx; } extern __inline__ int sun4c_set_context(int ctx) { __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)); return ctx; } #endif /* !(__ASSEMBLY__) */ #endif /* !(_SPARC_PGTSUN4C_H) */ |