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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 | /* * $Id: avmcard.h,v 1.4 1999/08/04 10:10:08 calle Exp $ * * Copyright 1999 by Carsten Paeth (calle@calle.in-berlin.de) * * $Log: avmcard.h,v $ * Revision 1.4 1999/08/04 10:10:08 calle * Bugfix: corrected /proc functions, added structure for new AVM cards. * * Revision 1.3 1999/07/23 08:41:47 calle * prepared for new AVM cards. * * Revision 1.2 1999/07/05 15:09:45 calle * - renamed "appl_release" to "appl_released". * - version und profile data now cleared on controller reset * - extended /proc interface, to allow driver and controller specific * informations to include by driver hackers. * * Revision 1.1 1999/07/01 15:26:22 calle * complete new version (I love it): * + new hardware independed "capi_driver" interface that will make it easy to: * - support other controllers with CAPI-2.0 (i.e. USB Controller) * - write a CAPI-2.0 for the passive cards * - support serial link CAPI-2.0 boxes. * + wrote "capi_driver" for all supported cards. * + "capi_driver" (supported cards) now have to be configured with * make menuconfig, in the past all supported cards where included * at once. * + new and better informations in /proc/capi/ * + new ioctl to switch trace of capi messages per controller * using "avmcapictrl trace [contr] on|off|...." * + complete testcircle with all supported cards and also the * PCMCIA cards (now patch for pcmcia-cs-3.0.13 needed) done. * */ #ifndef _AVMCARD_H_ #define _AVMCARD_H_ #define AVMB1_PORTLEN 0x1f #define AVM_MAXVERSION 8 #define AVM_NAPPS 30 #define AVM_NCCI_PER_CHANNEL 4 /* * Versions */ #define VER_DRIVER 0 #define VER_CARDTYPE 1 #define VER_HWID 2 #define VER_SERIAL 3 #define VER_OPTION 4 #define VER_PROTO 5 #define VER_PROFILE 6 #define VER_CAPI 7 enum avmcardtype { avm_b1isa, avm_b1pci, avm_b1pcmcia, avm_m1, avm_m2, avm_t1isa, avm_t1pci, avm_c4 }; typedef struct avmcard_dmainfo { __u32 recvlen; __u8 recvbuf[128+2048]; struct sk_buff_head send_queue; __u8 sendbuf[128+2048]; } avmcard_dmainfo; typedef struct avmcard { char name[32]; unsigned int port; unsigned irq; unsigned long membase; enum avmcardtype cardtype; int cardnr; /* for t1isa */ int versionlen; char versionbuf[1024]; char *version[AVM_MAXVERSION]; char cardname[32]; char infobuf[128]; /* for function procinfo */ char msgbuf[128]; /* capimsg msg part */ char databuf[2048]; /* capimsg data part */ int interrupt; void *mbase; __u32 csr; avmcard_dmainfo *dma; struct capi_ctr *ctrl; } avmcard; extern int b1_irq_table[16]; /* * LLI Messages to the ISDN-ControllerISDN Controller */ #define SEND_POLL 0x72 /* * after load <- RECEIVE_POLL */ #define SEND_INIT 0x11 /* * first message <- RECEIVE_INIT * int32 NumApplications int32 * NumNCCIs int32 BoardNumber */ #define SEND_REGISTER 0x12 /* * register an application int32 * ApplIDId int32 NumMessages * int32 NumB3Connections int32 * NumB3Blocks int32 B3Size * * AnzB3Connection != 0 && * AnzB3Blocks >= 1 && B3Size >= 1 */ #define SEND_RELEASE 0x14 /* * deregister an application int32 * ApplID */ #define SEND_MESSAGE 0x15 /* * send capi-message int32 length * capi-data ... */ #define SEND_DATA_B3_REQ 0x13 /* * send capi-data-message int32 * MsgLength capi-data ... int32 * B3Length data .... */ #define SEND_CONFIG 0x21 /* */ #define SEND_POLLACK 0x73 /* T1 Watchdog */ /* * LLI Messages from the ISDN-ControllerISDN Controller */ #define RECEIVE_POLL 0x32 /* * <- after SEND_POLL */ #define RECEIVE_INIT 0x27 /* * <- after SEND_INIT int32 length * byte total length b1struct board * driver revision b1struct card * type b1struct reserved b1struct * serial number b1struct driver * capability b1struct d-channel * protocol b1struct CAPI-2.0 * profile b1struct capi version */ #define RECEIVE_MESSAGE 0x21 /* * <- after SEND_MESSAGE int32 * AppllID int32 Length capi-data * .... */ #define RECEIVE_DATA_B3_IND 0x22 /* * received data int32 AppllID * int32 Length capi-data ... * int32 B3Length data ... */ #define RECEIVE_START 0x23 /* * Handshake */ #define RECEIVE_STOP 0x24 /* * Handshake */ #define RECEIVE_NEW_NCCI 0x25 /* * int32 AppllID int32 NCCI int32 * WindowSize */ #define RECEIVE_FREE_NCCI 0x26 /* * int32 AppllID int32 NCCI */ #define RECEIVE_RELEASE 0x26 /* * int32 AppllID int32 0xffffffff */ #define RECEIVE_TASK_READY 0x31 /* * int32 tasknr * int32 Length Taskname ... */ #define RECEIVE_DEBUGMSG 0x71 /* * int32 Length message * */ #define RECEIVE_POLLDWORD 0x75 /* t1pci in dword mode */ #define WRITE_REGISTER 0x00 #define READ_REGISTER 0x01 /* * port offsets */ #define B1_READ 0x00 #define B1_WRITE 0x01 #define B1_INSTAT 0x02 #define B1_OUTSTAT 0x03 #define B1_RESET 0x10 #define B1_ANALYSE 0x04 #define B1_STAT0(cardtype) ((cardtype) == avm_m1 ? 0x81200000l : 0x80A00000l) #define B1_STAT1(cardtype) (0x80E00000l) /* ---------------------------------------------------------------- */ static inline unsigned char b1outp(unsigned int base, unsigned short offset, unsigned char value) { outb(value, base + offset); return inb(base + B1_ANALYSE); } static inline int b1_rx_full(unsigned int base) { return inb(base + B1_INSTAT) & 0x1; } static inline unsigned char b1_get_byte(unsigned int base) { unsigned long stop = jiffies + 1 * HZ; /* maximum wait time 1 sec */ while (!b1_rx_full(base) && time_before(jiffies, stop)); if (b1_rx_full(base)) return inb(base + B1_READ); printk(KERN_CRIT "b1lli(0x%x): rx not full after 1 second\n", base); return 0; } static inline unsigned int b1_get_word(unsigned int base) { unsigned int val = 0; val |= b1_get_byte(base); val |= (b1_get_byte(base) << 8); val |= (b1_get_byte(base) << 16); val |= (b1_get_byte(base) << 24); return val; } static inline int b1_tx_empty(unsigned int base) { return inb(base + B1_OUTSTAT) & 0x1; } static inline void b1_put_byte(unsigned int base, unsigned char val) { while (!b1_tx_empty(base)); b1outp(base, B1_WRITE, val); } static inline int b1_save_put_byte(unsigned int base, unsigned char val) { unsigned long stop = jiffies + 2 * HZ; while (!b1_tx_empty(base) && time_before(jiffies,stop)); if (!b1_tx_empty(base)) return -1; b1outp(base, B1_WRITE, val); return 0; } static inline void b1_put_word(unsigned int base, unsigned int val) { b1_put_byte(base, val & 0xff); b1_put_byte(base, (val >> 8) & 0xff); b1_put_byte(base, (val >> 16) & 0xff); b1_put_byte(base, (val >> 24) & 0xff); } static inline unsigned int b1_get_slice(unsigned int base, unsigned char *dp) { unsigned int len, i; len = i = b1_get_word(base); while (i-- > 0) *dp++ = b1_get_byte(base); return len; } static inline void b1_put_slice(unsigned int base, unsigned char *dp, unsigned int len) { unsigned i = len; b1_put_word(base, i); while (i-- > 0) b1_put_byte(base, *dp++); } static void b1_wr_reg(unsigned int base, unsigned int reg, unsigned int value) { b1_put_byte(base, WRITE_REGISTER); b1_put_word(base, reg); b1_put_word(base, value); } static inline unsigned int b1_rd_reg(unsigned int base, unsigned int reg) { b1_put_byte(base, READ_REGISTER); b1_put_word(base, reg); return b1_get_word(base); } static inline void b1_reset(unsigned int base) { b1outp(base, B1_RESET, 0); udelay(55 * 2 * 1000); /* 2 TIC's */ b1outp(base, B1_RESET, 1); udelay(55 * 2 * 1000); /* 2 TIC's */ b1outp(base, B1_RESET, 0); udelay(55 * 2 * 1000); /* 2 TIC's */ } static inline unsigned char b1_disable_irq(unsigned int base) { return b1outp(base, B1_INSTAT, 0x00); } /* ---------------------------------------------------------------- */ static inline void b1_set_test_bit(unsigned int base, enum avmcardtype cardtype, int onoff) { b1_wr_reg(base, B1_STAT0(cardtype), onoff ? 0x21 : 0x20); } static inline int b1_get_test_bit(unsigned int base, enum avmcardtype cardtype) { return (b1_rd_reg(base, B1_STAT0(cardtype)) & 0x01) != 0; } /* ---------------------------------------------------------------- */ #define T1_FASTLINK 0x00 #define T1_SLOWLINK 0x08 #define T1_READ B1_READ #define T1_WRITE B1_WRITE #define T1_INSTAT B1_INSTAT #define T1_OUTSTAT B1_OUTSTAT #define T1_IRQENABLE 0x05 #define T1_FIFOSTAT 0x06 #define T1_RESETLINK 0x10 #define T1_ANALYSE 0x11 #define T1_IRQMASTER 0x12 #define T1_IDENT 0x17 #define T1_RESETBOARD 0x1f #define T1F_IREADY 0x01 #define T1F_IHALF 0x02 #define T1F_IFULL 0x04 #define T1F_IEMPTY 0x08 #define T1F_IFLAGS 0xF0 #define T1F_OREADY 0x10 #define T1F_OHALF 0x20 #define T1F_OEMPTY 0x40 #define T1F_OFULL 0x80 #define T1F_OFLAGS 0xF0 /* there are HEMA cards with 1k and 4k FIFO out */ #define FIFO_OUTBSIZE 256 #define FIFO_INPBSIZE 512 #define HEMA_VERSION_ID 0 #define HEMA_PAL_ID 0 static inline void t1outp(unsigned int base, unsigned short offset, unsigned char value) { outb(value, base + offset); } static inline unsigned char t1inp(unsigned int base, unsigned short offset) { return inb(base + offset); } static inline int t1_isfastlink(unsigned int base) { return (inb(base + T1_IDENT) & ~0x82) == 1; } static inline unsigned char t1_fifostatus(unsigned int base) { return inb(base + T1_FIFOSTAT); } static inline unsigned int t1_get_slice(unsigned int base, unsigned char *dp) { unsigned int len, i; #ifdef FASTLINK_DEBUG unsigned wcnt = 0, bcnt = 0; #endif len = i = b1_get_word(base); if (t1_isfastlink(base)) { int status; while (i > 0) { status = t1_fifostatus(base) & (T1F_IREADY|T1F_IHALF); if (i >= FIFO_INPBSIZE) status |= T1F_IFULL; switch (status) { case T1F_IREADY|T1F_IHALF|T1F_IFULL: insb(base+B1_READ, dp, FIFO_INPBSIZE); dp += FIFO_INPBSIZE; i -= FIFO_INPBSIZE; #ifdef FASTLINK_DEBUG wcnt += FIFO_INPBSIZE; #endif break; case T1F_IREADY|T1F_IHALF: insb(base+B1_READ,dp, i); #ifdef FASTLINK_DEBUG wcnt += i; #endif dp += i; i = 0; if (i == 0) break; /* fall through */ default: *dp++ = b1_get_byte(base); i--; #ifdef FASTLINK_DEBUG bcnt++; #endif break; } } #ifdef FASTLINK_DEBUG if (wcnt) printk(KERN_DEBUG "b1lli(0x%x): get_slice l=%d w=%d b=%d\n", base, len, wcnt, bcnt); #endif } else { while (i-- > 0) *dp++ = b1_get_byte(base); } return len; } static inline void t1_put_slice(unsigned int base, unsigned char *dp, unsigned int len) { unsigned i = len; b1_put_word(base, i); if (t1_isfastlink(base)) { int status; while (i > 0) { status = t1_fifostatus(base) & (T1F_OREADY|T1F_OHALF); if (i >= FIFO_OUTBSIZE) status |= T1F_OEMPTY; switch (status) { case T1F_OREADY|T1F_OHALF|T1F_OEMPTY: outsb(base+B1_WRITE, dp, FIFO_OUTBSIZE); dp += FIFO_OUTBSIZE; i -= FIFO_OUTBSIZE; break; case T1F_OREADY|T1F_OHALF: outsb(base+B1_WRITE, dp, i); dp += i; i = 0; break; default: b1_put_byte(base, *dp++); i--; break; } } } else { while (i-- > 0) b1_put_byte(base, *dp++); } } static inline void t1_disable_irq(unsigned int base) { t1outp(base, T1_IRQMASTER, 0x00); } static inline void t1_reset(unsigned int base) { /* reset T1 Controller */ b1_reset(base); /* disable irq on HEMA */ t1outp(base, B1_INSTAT, 0x00); t1outp(base, B1_OUTSTAT, 0x00); t1outp(base, T1_IRQMASTER, 0x00); /* reset HEMA board configuration */ t1outp(base, T1_RESETBOARD, 0xf); } static inline void b1_setinterrupt(unsigned int base, unsigned irq, enum avmcardtype cardtype) { switch (cardtype) { case avm_t1isa: t1outp(base, B1_INSTAT, 0x00); t1outp(base, B1_INSTAT, 0x02); t1outp(base, T1_IRQMASTER, 0x08); break; case avm_b1isa: b1outp(base, B1_INSTAT, 0x00); b1outp(base, B1_RESET, b1_irq_table[irq]); b1outp(base, B1_INSTAT, 0x02); break; default: case avm_m1: case avm_m2: case avm_b1pci: b1outp(base, B1_INSTAT, 0x00); b1outp(base, B1_RESET, 0xf0); b1outp(base, B1_INSTAT, 0x02); break; case avm_c4: case avm_t1pci: b1outp(base, B1_RESET, 0xf0); break; } } int b1_detect(unsigned int base, enum avmcardtype cardtype); int b1_load_t4file(unsigned int base, capiloaddatapart * t4file); int b1_load_config(unsigned int base, capiloaddatapart * config); int b1_loaded(unsigned int base); int b1_load_firmware(struct capi_ctr *ctrl, capiloaddata *data); void b1_reset_ctr(struct capi_ctr *ctrl); void b1_register_appl(struct capi_ctr *ctrl, __u16 appl, capi_register_params *rp); void b1_release_appl(struct capi_ctr *ctrl, __u16 appl); void b1_send_message(struct capi_ctr *ctrl, struct sk_buff *skb); void b1_parse_version(avmcard *card); void b1_handle_interrupt(avmcard * card); int b1ctl_read_proc(char *page, char **start, off_t off, int count, int *eof, struct capi_ctr *ctrl); #endif /* _AVMCARD_H_ */ |