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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 | #ifndef _ALPHA_SEMAPHORE_H #define _ALPHA_SEMAPHORE_H /* * SMP- and interrupt-safe semaphores.. * * (C) Copyright 1996 Linus Torvalds * (C) Copyright 1996 Richard Henderson */ #include <asm/current.h> #include <asm/system.h> #include <asm/atomic.h> struct semaphore { /* Careful, inline assembly knows about the position of these two. */ atomic_t count; atomic_t waking; /* biased by -1 */ struct wait_queue *wait; }; #define MUTEX ((struct semaphore) \ { ATOMIC_INIT(1), ATOMIC_INIT(-1), NULL }) #define MUTEX_LOCKED ((struct semaphore) \ { ATOMIC_INIT(0), ATOMIC_INIT(-1), NULL }) #define sema_init(sem, val) atomic_set(&((sem)->count), val) extern void __down(struct semaphore * sem); extern int __down_interruptible(struct semaphore * sem); extern int __down_trylock(struct semaphore * sem); extern void __up(struct semaphore * sem); /* All have custom assembly linkages. */ extern void __down_failed(struct semaphore * sem); extern void __down_failed_interruptible(struct semaphore * sem); extern void __down_failed_trylock(struct semaphore * sem); extern void __up_wakeup(struct semaphore * sem); /* * Whee. Hidden out of line code is fun. The contention cases are * handled out of line in kernel/sched.c; arch/alpha/lib/semaphore.S * takes care of making sure we can call it without clobbering regs. */ extern inline void down(struct semaphore * sem) { /* Given that we have to use particular hard registers to communicate with __down_failed anyway, reuse them in the atomic operation as well. __down_failed takes the semaphore address in $24, and it's return address in $28. The pv is loaded as usual. The gp is clobbered (in the module case) as usual. */ /* This little bit of silliness is to get the GP loaded for a function that ordinarily wouldn't. Otherwise we could have it done by the macro directly, which can be optimized the linker. */ register void *pv __asm__("$27") = __down_failed; __asm__ __volatile__ ( "/* semaphore down operation */\n" "1: ldl_l $24,%1\n" " subl $24,1,$24\n" " mov $24,$28\n" " stl_c $28,%1\n" " beq $28,2f\n" " blt $24,3f\n" "4: mb\n" ".section .text2,\"ax\"\n" "2: br 1b\n" "3: lda $24,%1\n" " jsr $28,($27),__down_failed\n" " ldgp $29,0($28)\n" " br 4b\n" ".previous" : "=r"(pv) : "m"(sem->count), "r"(pv) : "$24", "$28", "memory"); } extern inline int down_interruptible(struct semaphore * sem) { /* __down_failed_interruptible takes the semaphore address in $24, and it's return address in $28. The pv is loaded as usual. The gp is clobbered (in the module case) as usual. The return value is in $24. */ register int ret __asm__("$24"); register void *pv __asm__("$27") = __down_failed_interruptible; __asm__ __volatile__ ( "/* semaphore down interruptible operation */\n" "1: ldl_l $24,%2\n" " subl $24,1,$24\n" " mov $24,$28\n" " stl_c $28,%2\n" " beq $28,2f\n" " blt $24,3f\n" " mov $31,%0\n" "4: mb\n" ".section .text2,\"ax\"\n" "2: br 1b\n" "3: lda $24,%2\n" " jsr $28,($27),__down_failed_interruptible\n" " ldgp $29,0($28)\n" " br 4b\n" ".previous" : "=r"(ret), "=r"(pv) : "m"(sem->count), "r"(pv) : "$28", "memory"); return ret; } /* * down_trylock returns 0 on success, 1 if we failed to get the lock. * * We must manipulate count and waking simultaneously and atomically. * Do this by using ll/sc on the pair of 32-bit words. */ extern inline int down_trylock(struct semaphore * sem) { long ret, tmp, tmp2, sub; /* "Equivalent" C. Note that we have to do this all without (taken) branches in order to be a valid ll/sc sequence. do { tmp = ldq_l; sub = 0x0000000100000000; ret = ((int)tmp <= 0); // count =< 0 ? if ((int)tmp >= 0) sub = 0; // count >= 0 ? // note that if count=0 subq overflows to the high // longword (i.e waking) ret &= ((long)tmp < 0); // waking < 0 ? sub += 1; if (ret) break; tmp -= sub; tmp = stq_c = tmp; } while (tmp == 0); */ __asm__ __volatile__( "1: ldq_l %1,%4\n" " lda %3,1\n" " addl %1,0,%2\n" " sll %3,32,%3\n" " cmple %2,0,%0\n" " cmovge %2,0,%3\n" " cmplt %1,0,%2\n" " addq %3,1,%3\n" " and %0,%2,%0\n" " bne %0,2f\n" " subq %1,%3,%1\n" " stq_c %1,%4\n" " beq %1,3f\n" "2:\n" ".section .text2,\"ax\"\n" "3: br 1b\n" ".previous" : "=&r"(ret), "=&r"(tmp), "=&r"(tmp2), "=&r"(sub) : "m"(*sem) : "memory"); return ret; } extern inline void up(struct semaphore * sem) { /* Given that we have to use particular hard registers to communicate with __up_wakeup anyway, reuse them in the atomic operation as well. __up_wakeup takes the semaphore address in $24, and it's return address in $28. The pv is loaded as usual. The gp is clobbered (in the module case) as usual. */ register void *pv __asm__("$27") = __up_wakeup; __asm__ __volatile__ ( "/* semaphore up operation */\n" " mb\n" "1: ldl_l $24,%1\n" " addl $24,1,$24\n" " mov $24,$28\n" " stl_c $28,%1\n" " beq $28,2f\n" " mb\n" " ble $24,3f\n" "4:\n" ".section .text2,\"ax\"\n" "2: br 1b\n" "3: lda $24,%1\n" " jsr $28,($27),__up_wakeup\n" " ldgp $29,0($28)\n" " br 4b\n" ".previous" : "=r"(pv) : "m"(sem->count), "r"(pv) : "$24", "$28", "memory"); } #endif |