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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 | /* * eexpress.h: Intel EtherExpress16 defines */ /* * EtherExpress card register addresses * as offsets from the base IO region (dev->base_addr) */ #define DATAPORT 0x0000 #define WRITE_PTR 0x0002 #define READ_PTR 0x0004 #define SIGNAL_CA 0x0006 #define SET_IRQ 0x0007 #define SM_PTR 0x0008 #define MEM_Dec 0x000a #define MEM_Ctrl 0x000b #define MEM_Page_Ctrl 0x000c #define Config 0x000d #define EEPROM_Ctrl 0x000e #define ID_PORT 0x000f #define MEM_ECtrl 0x000f /* * card register defines */ /* SET_IRQ */ #define SIRQ_en 0x08 #define SIRQ_dis 0x00 /* EEPROM_Ctrl */ #define EC_Clk 0x01 #define EC_CS 0x02 #define EC_Wr 0x04 #define EC_Rd 0x08 #define ASIC_RST 0x40 #define i586_RST 0x80 #define eeprom_delay() { int _i = 40; while (--_i>0) { __SLOW_DOWN_IO; }} /* * i82586 Memory Configuration */ /* (System Configuration Pointer) System start up block, read after 586_RST */ #define SCP_START 0xfff6 /* Intermediate System Configuration Pointer */ #define ISCP_START 0x0000 /* System Command Block */ #define SCB_START 0x0008 /* Start of buffer region. Everything before this is used for control * structures and the CU configuration program. The memory layout is * determined in eexp_hw_probe(), once we know how much memory is * available on the card. */ #define TX_BUF_START 0x0100 #define TX_BUF_SIZE ((24+ETH_FRAME_LEN+31)&~0x1f) #define RX_BUF_SIZE ((32+ETH_FRAME_LEN+31)&~0x1f) /* * SCB defines */ /* these functions take the SCB status word and test the relevant status bit */ #define SCB_complete(s) ((s&0x8000)!=0) #define SCB_rxdframe(s) ((s&0x4000)!=0) #define SCB_CUdead(s) ((s&0x2000)!=0) #define SCB_RUdead(s) ((s&0x1000)!=0) #define SCB_ack(s) (s & 0xf000) /* Command unit status: 0=idle, 1=suspended, 2=active */ #define SCB_CUstat(s) ((s&0x0300)>>8) /* Receive unit status: 0=idle, 1=suspended, 2=out of resources, 4=ready */ #define SCB_RUstat(s) ((s&0x0070)>>4) /* SCB commands */ #define SCB_CUnop 0x0000 #define SCB_CUstart 0x0100 #define SCB_CUresume 0x0200 #define SCB_CUsuspend 0x0300 #define SCB_CUabort 0x0400 #define SCB_resetchip 0x0080 #define SCB_RUnop 0x0000 #define SCB_RUstart 0x0010 #define SCB_RUresume 0x0020 #define SCB_RUsuspend 0x0030 #define SCB_RUabort 0x0040 /* * Command block defines */ #define Stat_Done(s) ((s&0x8000)!=0) #define Stat_Busy(s) ((s&0x4000)!=0) #define Stat_OK(s) ((s&0x2000)!=0) #define Stat_Abort(s) ((s&0x1000)!=0) #define Stat_STFail ((s&0x0800)!=0) #define Stat_TNoCar(s) ((s&0x0400)!=0) #define Stat_TNoCTS(s) ((s&0x0200)!=0) #define Stat_TNoDMA(s) ((s&0x0100)!=0) #define Stat_TDefer(s) ((s&0x0080)!=0) #define Stat_TColl(s) ((s&0x0040)!=0) #define Stat_TXColl(s) ((s&0x0020)!=0) #define Stat_NoColl(s) (s&0x000f) /* Cmd_END will end AFTER the command if this is the first * command block after an SCB_CUstart, but BEFORE the command * for all subsequent commands. Best strategy is to place * Cmd_INT on the last command in the sequence, followed by a * dummy Cmd_Nop with Cmd_END after this. */ #define Cmd_END 0x8000 #define Cmd_SUS 0x4000 #define Cmd_INT 0x2000 #define Cmd_Nop 0x0000 #define Cmd_SetAddr 0x0001 #define Cmd_Config 0x0002 #define Cmd_MCast 0x0003 #define Cmd_Xmit 0x0004 #define Cmd_TDR 0x0005 #define Cmd_Dump 0x0006 #define Cmd_Diag 0x0007 /* * Frame Descriptor (Receive block) defines */ #define FD_Done(s) ((s&0x8000)!=0) #define FD_Busy(s) ((s&0x4000)!=0) #define FD_OK(s) ((s&0x2000)!=0) #define FD_CRC(s) ((s&0x0800)!=0) #define FD_Align(s) ((s&0x0400)!=0) #define FD_Resrc(s) ((s&0x0200)!=0) #define FD_DMA(s) ((s&0x0100)!=0) #define FD_Short(s) ((s&0x0080)!=0) #define FD_NoEOF(s) ((s&0x0040)!=0) struct rfd_header { volatile unsigned long flags; volatile unsigned short link; volatile unsigned short rbd_offset; volatile unsigned short dstaddr1; volatile unsigned short dstaddr2; volatile unsigned short dstaddr3; volatile unsigned short srcaddr1; volatile unsigned short srcaddr2; volatile unsigned short srcaddr3; volatile unsigned short length; /* This is actually a Receive Buffer Descriptor. The way we * arrange memory means that an RBD always follows the RFD that * points to it, so they might as well be in the same structure. */ volatile unsigned short actual_count; volatile unsigned short next_rbd; volatile unsigned short buf_addr1; volatile unsigned short buf_addr2; volatile unsigned short size; }; /* Returned data from the Time Domain Reflectometer */ #define TDR_LINKOK (1<<15) #define TDR_XCVRPROBLEM (1<<14) #define TDR_OPEN (1<<13) #define TDR_SHORT (1<<12) #define TDR_TIME 0x7ff |