Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 | #define RCS_ID "$Id: scc.c,v 1.63 1996/10/09 16:45:47 jreuter Exp jreuter $" #define VERSION "3.0" #define BANNER "Z8530 SCC driver version "VERSION".dl1bke (experimental) by DL1BKE\n" /* * Please use z8530drv-utils-3.0 with this version. * ------------------ */ /* ******************************************************************** * SCC.C - Linux driver for Z8530 based HDLC cards for AX.25 * ******************************************************************** ******************************************************************** Copyright (c) 1993, 1996 Joerg Reuter DL1BKE portions (c) 1993 Guido ten Dolle PE1NNZ ******************************************************************** The driver and the programs in the archive are UNDER CONSTRUCTION. The code is likely to fail, and so your kernel could --- even a whole network. This driver is intended for Amateur Radio use. If you are running it for commercial purposes, please drop me a note. I am nosy... ...BUT: ! You m u s t recognize the appropriate legislations of your country ! ! before you connect a radio to the SCC board and start to transmit or ! ! receive. The GPL allows you to use the d r i v e r, NOT the RADIO! ! For non-Amateur-Radio use please note that you might need a special allowance/licence from the designer of the SCC Board and/or the MODEM. This program is free software; you can redistribute it and/or modify it under the terms of the (modified) GNU General Public License delivered with the Linux kernel source. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should find a copy of the GNU General Public License in /usr/src/linux/COPYING; ******************************************************************** Incomplete history of z8530drv: ------------------------------- 940913 - started to write the driver, rescued most of my own code (and Hans Alblas' memory buffer pool concept) from an earlier project "sccdrv" which was initiated by Guido ten Dolle. Not much of the old driver survived, though. The first version I put my hands on was sccdrv1.3 from August 1993. The memory buffer pool concept appeared in an unauthorized sccdrv version (1.5) from August 1994. 950131 - changed copyright notice to GPL without limitations. . . <SNIP> . 961005 - New semester, new driver... * KISS TNC emulator removed (TTY driver) * Source moved to drivers/net/ * Includes Z8530 defines from drivers/net/z8530.h * Uses sk_buffer memory management * Doesn't have own queues anymore * Reduced overhead of /proc/net/z8530drv output * Streamlined quite a lot things * Invents brand new bugs... ;-) The move to version number 3.0 reflects theses changes. You can use version 2.4 if you need a KISS TNC emulator. Thanks to all who contributed to this driver with ideas and bug reports! NB -- if you find errors, change something, please let me know first before you distribute it... And please don't touch the version number. Just replace my callsign in "v3.0.dl1bke" with your own. Just to avoid confusion... If you want to add your modification to the linux distribution please (!) contact me first. New versions of the driver will be announced on the linux-hams mailing list on vger.rutgers.edu. To subscribe send an e-mail to majordomo@vger.rutgers.edu with the following line in the body of the mail: subscribe linux-hams The content of the "Subject" field will be ignored. vy 73, Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org AX-25 : DL1BKE @ DB0ACH.#NRW.DEU.EU Internet: jreuter@lykos.oche.de */ /* ----------------------------------------------------------------------- */ #undef SCC_DELAY /* perhaps your ISA bus is a *bit* too fast? */ #undef SCC_LDELAY 1 /* slow it even a bit more down */ #undef DONT_CHECK /* don't look if the SCCs you specified are available */ #define MAXSCC 4 /* number of max. supported chips */ #define BUFSIZE 384 /* must not exceed 4096 */ #undef DISABLE_ALL_INTS /* use cli()/sti() in ISR instead of */ /* enable_irq()/disable_irq() */ #undef SCC_DEBUG #define DEFAULT_CLOCK 4915200 /* default pclock if nothing is specified */ /* ----------------------------------------------------------------------- */ #include <linux/module.h> #include <linux/config.h> #include <linux/errno.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/timer.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/string.h> #include <linux/in.h> #include <linux/fcntl.h> #include <linux/ptrace.h> #include <linux/malloc.h> #include <linux/delay.h> #include <linux/skbuff.h> #include <linux/netdevice.h> #include <linux/if_ether.h> #include <linux/if_arp.h> #include <linux/socket.h> #include <linux/scc.h> #include "z8530.h" #include <net/ax25.h> #include <asm/irq.h> #include <asm/system.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/bitops.h> #include <stdlib.h> #include <stdio.h> #include <ctype.h> #include <time.h> #include <linux/kernel.h> #include <linux/proc_fs.h> #ifdef MODULE int init_module(void); void cleanup_module(void); #endif int scc_init(void); static void t_dwait(unsigned long); static void t_txdelay(unsigned long); static void t_tail(unsigned long); static void t_busy(unsigned long); static void t_maxkeyup(unsigned long); static void t_idle(unsigned long); static void scc_tx_done(struct scc_channel *); static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long); static void scc_start_maxkeyup(struct scc_channel *); static void scc_start_defer(struct scc_channel *); static void z8530_init(void); static void init_channel(struct scc_channel *scc); static void scc_key_trx (struct scc_channel *scc, char tx); static void scc_isr(int irq, void *dev_id, struct pt_regs *regs); static void scc_init_timer(struct scc_channel *scc); static int scc_net_setup(struct scc_channel *scc, unsigned char *name); static int scc_net_init(struct device *dev); static int scc_net_open(struct device *dev); static int scc_net_close(struct device *dev); static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb); static int scc_net_tx(struct sk_buff *skb, struct device *dev); static int scc_net_ioctl(struct device *dev, struct ifreq *ifr, int cmd); static int scc_net_set_mac_address(struct device *dev, void *addr); static int scc_net_rebuild_header(void *buff, struct device *dev, unsigned long raddr, struct sk_buff *skb); static int scc_net_header(struct sk_buff *skb, struct device *dev, unsigned short type, void *daddr, void *saddr, unsigned len); static struct enet_statistics * scc_net_get_stats(struct device *dev); static unsigned char *SCC_DriverName = "scc"; static struct irqflags { unsigned char used : 1; } Ivec[16]; static struct scc_channel SCC_Info[2 * MAXSCC]; /* information per channel */ static struct scc_ctrl { io_port chan_A; io_port chan_B; int irq; } SCC_ctrl[MAXSCC+1]; static unsigned char Driver_Initialized = 0; static int Nchips = 0; static io_port Vector_Latch = 0; /* ******************************************************************** */ /* * Port Access Functions * */ /* ******************************************************************** */ /* These provide interrupt save 2-step access to the Z8530 registers */ static __inline__ unsigned char InReg(io_port port, unsigned char reg) { unsigned long flags; unsigned char r; save_flags(flags); cli(); #ifdef SCC_LDELAY Outb(port, reg); udelay(SCC_LDELAY); r=Inb(port); udelay(SCC_LDELAY); #else Outb(port, reg); r=Inb(port); #endif restore_flags(flags); return r; } static __inline__ void OutReg(io_port port, unsigned char reg, unsigned char val) { unsigned long flags; save_flags(flags); cli(); #ifdef SCC_LDELAY Outb(port, reg); udelay(SCC_LDELAY); Outb(port, val); udelay(SCC_LDELAY); #else Outb(port, reg); Outb(port, val); #endif restore_flags(flags); } static __inline__ void wr(struct scc_channel *scc, unsigned char reg, unsigned char val) { OutReg(scc->ctrl, reg, (scc->wreg[reg] = val)); } static __inline__ void or(struct scc_channel *scc, unsigned char reg, unsigned char val) { OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val)); } static __inline__ void cl(struct scc_channel *scc, unsigned char reg, unsigned char val) { OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val)); } #ifdef DISABLE_ALL_INTS static __inline__ void scc_cli(int irq) { cli(); } static __inline__ void scc_sti(int irq) { sti(); } #else static __inline__ void scc_cli(int irq) { disable_irq(irq); } static __inline__ void scc_sti(int irq) { enable_irq(irq); } #endif /* ******************************************************************** */ /* * Some useful macros * */ /* ******************************************************************** */ static __inline__ void scc_lock_dev(struct scc_channel *scc) { scc->dev->tbusy = 1; } static __inline__ void scc_unlock_dev(struct scc_channel *scc) { scc->tx_next_buff = NULL; scc->dev->tbusy = 0; } static __inline__ void scc_discard_buffers(struct scc_channel *scc) { unsigned long flags; save_flags(flags); cli(); if (scc->tx_buff != NULL) { dev_kfree_skb(scc->tx_buff, FREE_WRITE); scc->tx_buff = NULL; } if (scc->tx_next_buff != NULL) { dev_kfree_skb(scc->tx_next_buff, FREE_WRITE); scc->tx_next_buff = NULL; } restore_flags(flags); } /* ******************************************************************** */ /* * Interrupt Service Routines * */ /* ******************************************************************** */ /* ----> subroutines for the interrupt handlers <---- */ static __inline__ void scc_notify(struct scc_channel *scc, int event) { struct sk_buff *skb; char *bp; if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA) return; skb = dev_alloc_skb(2); if (skb != NULL) { skb->free = 1; bp = skb_put(skb, 2); *bp++ = PARAM_HWEVENT; *bp++ = event; scc_net_rx(scc, skb); } else scc->stat.nospace++; } static __inline__ void flush_rx_FIFO(struct scc_channel *scc) { int k; for (k=0; k<3; k++) Inb(scc->data); if(scc->rx_buff != NULL) /* did we receive something? */ { scc->stat.rxerrs++; /* then count it as an error */ kfree_skb(scc->rx_buff, FREE_READ); scc->rx_buff = NULL; } } /* ----> four different interrupt handlers for Tx, Rx, changing of */ /* DCD/CTS and Rx/Tx errors */ /* Transmitter interrupt handler */ static __inline__ void scc_txint(struct scc_channel *scc) { struct sk_buff *skb; scc->stat.txints++; skb = scc->tx_buff; /* send first octet */ if (skb == NULL) { skb = scc->tx_next_buff; scc->tx_buff = skb; if (skb == NULL) { scc_tx_done(scc); Outb(scc->ctrl, RES_Tx_P); return; } if (skb->len == 0) /* Paranoia... */ { dev_kfree_skb(skb, FREE_WRITE); scc->tx_buff = NULL; scc_tx_done(scc); Outb(scc->ctrl, RES_Tx_P); return; } scc_unlock_dev(scc); scc->stat.tx_state = TXS_ACTIVE; OutReg(scc->ctrl, R0, RES_Tx_CRC); /* reset CRC generator */ or(scc,R10,ABUNDER); /* re-install underrun protection */ Outb(scc->data,*skb->data); /* send byte */ skb_pull(skb, 1); if (!scc->enhanced) /* reset EOM latch */ Outb(scc->ctrl,RES_EOM_L); return; } /* End Of Frame... */ if (skb->len == 0) { Outb(scc->ctrl, RES_Tx_P); /* reset pending int */ cl(scc, R10, ABUNDER); /* send CRC */ dev_kfree_skb(skb, FREE_WRITE); scc->tx_buff = NULL; scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */ return; } /* send octet */ Outb(scc->data,*skb->data); skb_pull(skb, 1); } /* External/Status interrupt handler */ static __inline__ void scc_exint(struct scc_channel *scc) { unsigned char status,changes,chg_and_stat; scc->stat.exints++; status = InReg(scc->ctrl,R0); changes = status ^ scc->status; chg_and_stat = changes & status; /* ABORT: generated whenever DCD drops while receiving */ if (chg_and_stat & BRK_ABRT) /* Received an ABORT */ flush_rx_FIFO(scc); /* DCD: on = start to receive packet, off = ABORT condition */ /* (a successfully received packet generates a special condition int) */ if(changes & DCD) /* DCD input changed state */ { if(status & DCD) /* DCD is now ON */ { if (scc->modem.clocksrc != CLK_EXTERNAL) OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */ } else { /* DCD is now OFF */ cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */ flush_rx_FIFO(scc); } if (!scc->kiss.softdcd) scc_notify(scc, (status & DCD)? HWEV_DCD_ON:HWEV_DCD_OFF); } /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */ if (changes & SYNC_HUNT) { if (scc->kiss.softdcd) scc_notify(scc, (status & SYNC_HUNT)? HWEV_DCD_OFF:HWEV_DCD_ON); else cl(scc,R15,SYNCIE); /* oops, we were too lazy to disable this? */ } #ifdef notdef /* CTS: use external TxDelay (what's that good for?!) * Anyway: If we _could_ use it (BayCom USCC uses CTS for * own purposes) we _should_ use the "autoenable" feature * of the Z8530 and not this interrupt... */ if (chg_and_stat & CTS) /* CTS is now ON */ { if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */ scc_start_tx_timer(scc, t_txdelay, 0); } #endif if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM)) { scc->stat.tx_under++; /* oops, an underrun! count 'em */ Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */ if (scc->tx_buff != NULL) { dev_kfree_skb(scc->tx_buff, FREE_WRITE); scc->tx_buff = NULL; } or(scc,R10,ABUNDER); scc_start_tx_timer(scc, t_txdelay, 1); /* restart transmission */ } scc->status = status; Outb(scc->ctrl,RES_EXT_INT); } /* Receiver interrupt handler */ static __inline__ void scc_rxint(struct scc_channel *scc) { struct sk_buff *skb; scc->stat.rxints++; if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF) { Inb(scc->data); /* discard char */ or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ return; } skb = scc->rx_buff; if (skb == NULL) { skb = dev_alloc_skb(scc->stat.bufsize); if (skb == NULL) { scc->dev_stat.rx_dropped++; scc->stat.nospace++; Inb(scc->data); or(scc, R3, ENT_HM); return; } skb->free = 1; scc->rx_buff = skb; *(skb_put(skb, 1)) = 0; /* KISS data */ } if (skb->len >= scc->stat.bufsize) { #ifdef notdef printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n"); #endif kfree_skb(skb, FREE_READ); scc->rx_buff = NULL; Inb(scc->data); or(scc, R3, ENT_HM); return; } *(skb_put(skb, 1)) = Inb(scc->data); } /* Receive Special Condition interrupt handler */ static __inline__ void scc_spint(struct scc_channel *scc) { unsigned char status; struct sk_buff *skb; scc->stat.spints++; status = InReg(scc->ctrl,R1); /* read receiver status */ Inb(scc->data); /* throw away Rx byte */ skb = scc->rx_buff; if(status & Rx_OVR) /* receiver overrun */ { scc->stat.rx_over++; /* count them */ or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ if (skb != NULL) kfree_skb(skb, FREE_READ); scc->rx_buff = NULL; } if(status & END_FR && skb != NULL) /* end of frame */ { /* CRC okay, frame ends on 8 bit boundary and received something ? */ if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0) { /* ignore last received byte (first of the CRC bytes) */ skb_trim(skb, skb->len-1); scc_net_rx(scc, skb); scc->rx_buff = NULL; scc->stat.rxframes++; } else { /* a bad frame */ kfree_skb(skb, FREE_READ); scc->rx_buff = NULL; scc->stat.rxerrs++; } } Outb(scc->ctrl,ERR_RES); } /* ----> interrupt service routine for the Z8530 <---- */ static void scc_isr_dispatch(struct scc_channel *scc, int vector) { switch (vector & VECTOR_MASK) { case TXINT: scc_txint(scc); break; case EXINT: scc_exint(scc); break; case RXINT: scc_rxint(scc); break; case SPINT: scc_spint(scc); break; } } /* If the card has a latch for the interrupt vector (like the PA0HZP card) use it to get the number of the chip that generated the int. If not: poll all defined chips. */ #define SCC_IRQTIMEOUT 30000 static void scc_isr(int irq, void *dev_id, struct pt_regs *regs) { unsigned char vector; struct scc_channel *scc; struct scc_ctrl *ctrl; int k; scc_cli(irq); if (Vector_Latch) { for(k=0; k < SCC_IRQTIMEOUT; k++) { Outb(Vector_Latch, 0); /* Generate INTACK */ /* Read the vector */ if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break; if (vector & 0x01) break; scc=&SCC_Info[vector >> 3 ^ 0x01]; if (!scc->dev) break; scc_isr_dispatch(scc, vector); OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */ } scc_sti(irq); if (k == SCC_IRQTIMEOUT) printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n"); return; } /* Find the SCC generating the interrupt by polling all attached SCCs * reading RR3A (the interrupt pending register) */ ctrl = SCC_ctrl; while (ctrl->chan_A) { if (ctrl->irq != irq) { ctrl++; continue; } scc = NULL; for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++) { vector=InReg(ctrl->chan_B,R2); /* Read the vector */ if (vector & 0x01) break; scc = &SCC_Info[vector >> 3 ^ 0x01]; if (!scc->dev) break; scc_isr_dispatch(scc, vector); } if (k == SCC_IRQTIMEOUT) { printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n"); break; } /* This looks wierd and it is. At least the BayCom USCC doesn't * use the Interrupt Daisy Chain, thus we'll have to start * all over again to be sure not to miss an interrupt from * (any of) the other chip(s)... * Honestly, the situation *is* braindamaged... */ if (scc != NULL) { OutReg(scc->ctrl,R0,RES_H_IUS); ctrl = SCC_ctrl; } else ctrl++; } scc_sti(irq); } /* ******************************************************************** */ /* * Init Channel */ /* ******************************************************************** */ /* ----> set SCC channel speed <---- */ static __inline__ void set_brg(struct scc_channel *scc, unsigned int tc) { cl(scc,R14,BRENABL); /* disable baudrate generator */ wr(scc,R12,tc & 255); /* brg rate LOW */ wr(scc,R13,tc >> 8); /* brg rate HIGH */ or(scc,R14,BRENABL); /* enable baudrate generator */ } static __inline__ void set_speed(struct scc_channel *scc) { disable_irq(scc->irq); if (scc->modem.speed > 0) /* paranoia... */ set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2); enable_irq(scc->irq); } /* ----> initialize a SCC channel <---- */ static __inline__ void init_brg(struct scc_channel *scc) { wr(scc, R14, BRSRC); /* BRG source = PCLK */ OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */ OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */ } /* * Initialization according to the Z8530 manual (SGS-Thomson's version): * * 1. Modes and constants * * WR9 11000000 chip reset * WR4 XXXXXXXX Tx/Rx control, async or sync mode * WR1 0XX00X00 select W/REQ (optional) * WR2 XXXXXXXX program interrupt vector * WR3 XXXXXXX0 select Rx control * WR5 XXXX0XXX select Tx control * WR6 XXXXXXXX sync character * WR7 XXXXXXXX sync character * WR9 000X0XXX select interrupt control * WR10 XXXXXXXX miscellaneous control (optional) * WR11 XXXXXXXX clock control * WR12 XXXXXXXX time constant lower byte (optional) * WR13 XXXXXXXX time constant upper byte (optional) * WR14 XXXXXXX0 miscellaneous control * WR14 XXXSSSSS commands (optional) * * 2. Enables * * WR14 000SSSS1 baud rate enable * WR3 SSSSSSS1 Rx enable * WR5 SSSS1SSS Tx enable * WR0 10000000 reset Tx CRG (optional) * WR1 XSS00S00 DMA enable (optional) * * 3. Interrupt status * * WR15 XXXXXXXX enable external/status * WR0 00010000 reset external status * WR0 00010000 reset external status twice * WR1 SSSXXSXX enable Rx, Tx and Ext/status * WR9 000SXSSS enable master interrupt enable * * 1 = set to one, 0 = reset to zero * X = user defined, S = same as previous init * * * Note that the implementation differs in some points from above scheme. * */ static void init_channel(struct scc_channel *scc) { disable_irq(scc->irq); if (scc->tx_t.next) del_timer(&scc->tx_t); if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ wr(scc,R1,0); /* no W/REQ operation */ wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ wr(scc,R6,0); /* SDLC address zero (not used) */ wr(scc,R7,FLAG); /* SDLC flag value */ wr(scc,R9,VIS); /* vector includes status */ wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ wr(scc,R14, 0); /* set clock sources: CLK_DPLL: normal halfduplex operation RxClk: use DPLL TxClk: use DPLL TRxC mode DPLL output CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem) BayCom: others: TxClk = pin RTxC TxClk = pin TRxC RxClk = pin TRxC RxClk = pin RTxC CLK_DIVIDER: RxClk = use DPLL TxClk = pin RTxC BayCom: others: pin TRxC = DPLL pin TRxC = BRG (RxClk * 1) (RxClk * 32) */ switch(scc->modem.clocksrc) { case CLK_DPLL: wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); init_brg(scc); break; case CLK_DIVIDER: wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); init_brg(scc); break; case CLK_EXTERNAL: wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); OutReg(scc->ctrl, R14, DISDPLL); break; } set_speed(scc); /* set baudrate */ if(scc->enhanced) { or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */ wr(scc,R7,AUTOEOM); } if((InReg(scc->ctrl,R0)) & DCD) /* DCD is now ON */ { if (scc->modem.clocksrc != CLK_EXTERNAL) or(scc,R14, SEARCH); or(scc,R3,ENT_HM|RxENABLE); /* enable the receiver, hunt mode */ } /* enable ABORT, DCD & SYNC/HUNT interrupts */ wr(scc,R15, BRKIE|TxUIE|DCDIE); if (scc->kiss.softdcd) or(scc,R15, SYNCIE); Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */ or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ scc->status = InReg(scc->ctrl,R0); /* read initial status */ or(scc,R9,MIE); /* master interrupt enable */ scc_init_timer(scc); enable_irq(scc->irq); } /* ******************************************************************** */ /* * SCC timer functions * */ /* ******************************************************************** */ /* ----> scc_key_trx sets the time constant for the baudrate generator and keys the transmitter <---- */ static void scc_key_trx(struct scc_channel *scc, char tx) { unsigned int time_const; if (scc->brand & PRIMUS) Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0)); if (scc->modem.speed < 300) scc->modem.speed = 1200; time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2; disable_irq(scc->irq); if (tx) { or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */ or(scc, R15, TxUIE); } if (scc->modem.clocksrc == CLK_DPLL) { /* force simplex operation */ if (tx) { cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */ cl(scc, R15, DCDIE); /* No DCD changes, please */ set_brg(scc, time_const); /* reprogram baudrate generator */ /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */ wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ } else { cl(scc,R5,RTS|TxENAB); set_brg(scc, time_const); /* reprogram baudrate generator */ /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */ wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); or(scc,R3,RxENABLE|ENT_HM); or(scc,R15, DCDIE); } } else { if (tx) { if (scc->kiss.fulldup == KISS_DUPLEX_HALF) { cl(scc, R3, RxENABLE); cl(scc, R15, DCDIE); } or(scc,R5,RTS|TxENAB); /* enable tx */ } else { cl(scc,R5,RTS|TxENAB); /* disable tx */ if (scc->kiss.fulldup == KISS_DUPLEX_HALF) { or(scc, R3, RxENABLE|ENT_HM); or(scc, R15, DCDIE); } } } enable_irq(scc->irq); } /* ----> SCC timer interrupt handler and friends. <---- */ static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when) { unsigned long flags; save_flags(flags); cli(); if (scc->tx_t.next) del_timer(&scc->tx_t); if (when == 0) { handler((unsigned long) scc); } else if (when != TIMER_OFF) { scc->tx_t.data = (unsigned long) scc; scc->tx_t.function = handler; scc->tx_t.expires = jiffies + (when*HZ)/100; add_timer(&scc->tx_t); } restore_flags(flags); } static void scc_start_defer(struct scc_channel *scc) { unsigned long flags; save_flags(flags); cli(); if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF) { scc->tx_wdog.data = (unsigned long) scc; scc->tx_wdog.function = t_busy; scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer; add_timer(&scc->tx_wdog); } restore_flags(flags); } static void scc_start_maxkeyup(struct scc_channel *scc) { unsigned long flags; save_flags(flags); cli(); if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF) { scc->tx_wdog.data = (unsigned long) scc; scc->tx_wdog.function = t_maxkeyup; scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup; add_timer(&scc->tx_wdog); } restore_flags(flags); } /* * This is called from scc_txint() when there are no more frames to send. * Not exactly a timer function, but it is a close friend of the family... */ static void scc_tx_done(struct scc_channel *scc) { /* * trx remains keyed in fulldup mode 2 until t_idle expires. */ switch (scc->kiss.fulldup) { case KISS_DUPLEX_LINK: scc->stat.tx_state = TXS_IDLE2; if (scc->kiss.idletime != TIMER_OFF) scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100); break; case KISS_DUPLEX_OPTIMA: scc_notify(scc, HWEV_ALL_SENT); break; default: scc->stat.tx_state = TXS_BUSY; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } scc_unlock_dev(scc); } static unsigned char Rand = 17; static __inline__ int is_grouped(struct scc_channel *scc) { int k; struct scc_channel *scc2; unsigned char grp1, grp2; grp1 = scc->kiss.group; for (k = 0; k < (Nchips * 2); k++) { scc2 = &SCC_Info[k]; grp2 = scc2->kiss.group; if (scc2 == scc || !(scc2->dev && grp2)) continue; if ((grp1 & 0x3f) == (grp2 & 0x3f)) { if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) ) return 1; if ( (grp1 & RXGROUP) && (scc2->status & DCD) ) return 1; } } return 0; } /* DWAIT and SLOTTIME expired * * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer * else key trx and start txdelay * fulldup == 1: key trx and start txdelay * fulldup == 2: mintime expired, reset status or key trx and start txdelay */ static void t_dwait(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ { if (scc->tx_next_buff == NULL) /* nothing to send */ { scc->stat.tx_state = TXS_IDLE; scc_unlock_dev(scc); /* t_maxkeyup locked it. */ return; } scc->stat.tx_state = TXS_BUSY; } if (scc->kiss.fulldup == KISS_DUPLEX_HALF) { Rand = Rand * 17 + 31; if ( (scc->kiss.softdcd? !(scc->status & SYNC_HUNT):(scc->status & DCD)) || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) ) { scc_start_defer(scc); scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime); return ; } } if ( !(scc->wreg[R5] & RTS) ) { scc_key_trx(scc, TX_ON); scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); } else { scc_start_tx_timer(scc, t_txdelay, 0); } } /* TXDELAY expired * * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog. */ static void t_txdelay(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; scc_start_maxkeyup(scc); if (scc->tx_buff == NULL) { disable_irq(scc->irq); scc_txint(scc); enable_irq(scc->irq); } } /* TAILTIME expired * * switch off transmitter. If we were stopped by Maxkeyup restart * transmission after 'mintime' seconds */ static void t_tail(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; save_flags(flags); cli(); if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); scc_key_trx(scc, TX_OFF); restore_flags(flags); if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */ { scc->stat.tx_state = TXS_WAIT; if (scc->kiss.mintime != TIMER_OFF) /* try it again */ scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); else scc_start_tx_timer(scc, t_dwait, 0); return; } scc->stat.tx_state = TXS_IDLE; scc_unlock_dev(scc); } /* BUSY timeout * * throw away send buffers if DCD remains active too long. */ static void t_busy(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; save_flags(flags); cli(); if (scc->tx_t.next) del_timer(&scc->tx_t); restore_flags(flags); scc_lock_dev(scc); scc_discard_buffers(scc); scc->stat.txerrs++; scc->stat.tx_state = TXS_IDLE; scc_unlock_dev(scc); } /* MAXKEYUP timeout * * this is our watchdog. */ static void t_maxkeyup(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; save_flags(flags); cli(); /* * let things settle down before we start to * accept new data. */ scc_lock_dev(scc); scc_discard_buffers(scc); if (scc->tx_t.next) del_timer(&scc->tx_t); cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */ cl(scc, R15, TxUIE); /* count it. */ OutReg(scc->ctrl, R0, RES_Tx_P); restore_flags(flags); scc->stat.txerrs++; scc->stat.tx_state = TXS_TIMEOUT; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } /* IDLE timeout * * in fulldup mode 2 it keys down the transmitter after 'idle' seconds * of inactivity. We will not restart transmission before 'mintime' * expires. */ static void t_idle(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; save_flags(flags); cli(); if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); restore_flags(flags); scc_key_trx(scc, TX_OFF); if (scc->kiss.mintime != TIMER_OFF) scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); scc->stat.tx_state = TXS_WAIT; } static void scc_init_timer(struct scc_channel *scc) { unsigned long flags; save_flags(flags); cli(); scc->stat.tx_state = TXS_IDLE; restore_flags(flags); } /* ******************************************************************** */ /* * Set/get L1 parameters * */ /* ******************************************************************** */ /* * this will set the "hardware" parameters through KISS commands or ioctl() */ #define CAST(x) (unsigned long)(x) static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg) { int dcd; switch (cmd) { case PARAM_TXDELAY: scc->kiss.txdelay=arg; break; case PARAM_PERSIST: scc->kiss.persist=arg; break; case PARAM_SLOTTIME: scc->kiss.slottime=arg; break; case PARAM_TXTAIL: scc->kiss.tailtime=arg; break; case PARAM_FULLDUP: scc->kiss.fulldup=arg; break; case PARAM_DTR: break; /* does someone need this? */ case PARAM_GROUP: scc->kiss.group=arg; break; case PARAM_IDLE: scc->kiss.idletime=arg; break; case PARAM_MIN: scc->kiss.mintime=arg; break; case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break; case PARAM_WAIT: scc->kiss.waittime=arg; break; case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break; case PARAM_TX: scc->kiss.tx_inhibit=arg; break; case PARAM_SOFTDCD: scc->kiss.softdcd=arg; if (arg) or(scc, R15, SYNCIE); else cl(scc, R15, SYNCIE); break; case PARAM_SPEED: if (arg < 256) scc->modem.speed=arg*100; else scc->modem.speed=arg; if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */ set_speed(scc); break; case PARAM_RTS: if ( !(scc->wreg[R5] & RTS) ) { if (arg != TX_OFF) scc_key_trx(scc, TX_ON); scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); } else { if (arg == TX_OFF) { scc->stat.tx_state = TXS_BUSY; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } } break; case PARAM_HWEVENT: dcd = (scc->kiss.softdcd? !(scc->status & SYNC_HUNT):(scc->status & DCD)); scc_notify(scc, dcd? HWEV_DCD_ON:HWEV_DCD_OFF); break; default: return -EINVAL; } return 0; } static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd) { switch (cmd) { case PARAM_TXDELAY: return CAST(scc->kiss.txdelay); case PARAM_PERSIST: return CAST(scc->kiss.persist); case PARAM_SLOTTIME: return CAST(scc->kiss.slottime); case PARAM_TXTAIL: return CAST(scc->kiss.tailtime); case PARAM_FULLDUP: return CAST(scc->kiss.fulldup); case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd); case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0); case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0); case PARAM_SPEED: return CAST(scc->modem.speed); case PARAM_GROUP: return CAST(scc->kiss.group); case PARAM_IDLE: return CAST(scc->kiss.idletime); case PARAM_MIN: return CAST(scc->kiss.mintime); case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup); case PARAM_WAIT: return CAST(scc->kiss.waittime); case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer); case PARAM_TX: return CAST(scc->kiss.tx_inhibit); default: return NO_SUCH_PARAM; } } #undef CAST #undef SVAL /* ******************************************************************* */ /* * Init channel structures, special HW, etc... * */ /* ******************************************************************* */ /* * Reset the Z8530s and setup special hardware */ static void z8530_init(void) { struct scc_channel *scc; int chip, k; unsigned long flags; char *flag; printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2); flag=" "; for (k = 0; k < 16; k++) if (Ivec[k].used) { printk("%s%d", flag, k); flag=","; } printk("\n"); /* reset and pre-init all chips in the system */ for (chip = 0; chip < Nchips; chip++) { scc=&SCC_Info[2*chip]; if (!scc->ctrl) continue; /* Special SCC cards */ if(scc->brand & EAGLE) /* this is an EAGLE card */ Outb(scc->special,0x08); /* enable interrupt on the board */ if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */ Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */ /* Reset and pre-init Z8530 */ save_flags(flags); cli(); Outb(scc->ctrl, 0); OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */ udelay(100); /* give it 'a bit' more time than required */ wr(scc, R2, chip*16); /* interrupt vector */ wr(scc, R9, VIS); /* vector includes status */ restore_flags(flags); } Driver_Initialized = 1; } /* * Allocate device structure, err, instance, and register driver */ static int scc_net_setup(struct scc_channel *scc, unsigned char *name) { unsigned char *buf; struct device *dev; if (dev_get(name) != NULL) { printk(KERN_INFO "Z8530drv: device %s already exists.\n", name); return -EEXIST; } if ((scc->dev = (struct device *) kmalloc(sizeof(struct device), GFP_KERNEL)) == NULL) return -ENOMEM; dev = scc->dev; memset(dev, 0, sizeof(struct device)); buf = (unsigned char *) kmalloc(10, GFP_KERNEL); strcpy(buf, name); dev->priv = (void *) scc; dev->name = buf; dev->init = scc_net_init; if (register_netdev(dev) != 0) { kfree(dev); return -EIO; } return 0; } /* ******************************************************************** */ /* * Network driver methods * */ /* ******************************************************************** */ static unsigned char ax25_bcast[AX25_ADDR_LEN] = {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1}; static unsigned char ax25_nocall[AX25_ADDR_LEN] = {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1}; /* ----> Initialize device <----- */ static int scc_net_init(struct device *dev) { int k; for (k=0; k < DEV_NUMBUFFS; k++) skb_queue_head_init(&dev->buffs[k]); dev->tx_queue_len = 16; /* should be enough... */ dev->open = scc_net_open; dev->stop = scc_net_close; dev->hard_start_xmit = scc_net_tx; dev->hard_header = scc_net_header; dev->rebuild_header = scc_net_rebuild_header; dev->set_mac_address = scc_net_set_mac_address; dev->get_stats = scc_net_get_stats; dev->do_ioctl = scc_net_ioctl; memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN); memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN); dev->flags = 0; dev->family = AF_INET; dev->pa_addr = 0; dev->pa_brdaddr = 0; dev->pa_mask = 0; dev->pa_alen = 4; dev->type = ARPHRD_AX25; dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; dev->mtu = AX25_DEF_PACLEN; dev->addr_len = AX25_ADDR_LEN; return 0; } /* ----> open network device <---- */ static int scc_net_open(struct device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; if (scc == NULL || scc->magic != SCC_MAGIC) return -ENODEV; if (!scc->init) return -EINVAL; MOD_INC_USE_COUNT; scc->tx_buff = scc->tx_next_buff = NULL; init_channel(scc); dev->tbusy = 0; dev->start = 1; return 0; } /* ----> close network device <---- */ static int scc_net_close(struct device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; unsigned long flags; if (scc == NULL || scc->magic != SCC_MAGIC) return -ENODEV; MOD_DEC_USE_COUNT; save_flags(flags); cli(); Outb(scc->ctrl,0); /* Make sure pointer is written */ wr(scc,R1,0); /* disable interrupts */ wr(scc,R3,0); del_timer(&scc->tx_t); del_timer(&scc->tx_wdog); restore_flags(flags); scc_discard_buffers(scc); dev->tbusy = 1; dev->start = 0; return 0; } /* ----> receive frame, called from scc_rxint() <---- */ static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb) { if (skb->len == 0) { kfree_skb(skb, FREE_READ); return; } scc->dev_stat.rx_packets++; skb->dev = scc->dev; skb->protocol = htons(ETH_P_AX25); skb->mac.raw = skb->data; netif_rx(skb); return; } /* ----> transmit frame <---- */ static int scc_net_tx(struct sk_buff *skb, struct device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; unsigned long flags; char kisscmd; long ticks; if (dev->tbusy) { ticks = (signed) (jiffies - dev->trans_start); if (ticks < scc->kiss.maxdefer*HZ || scc == NULL) return 1; /* * Throw away transmission queue. */ if (scc->tx_wdog.next) del_timer(&scc->tx_wdog); t_busy((unsigned long) scc); dev->trans_start = jiffies; } if (skb == NULL) { dev_tint(dev); return 0; } if (scc == NULL || scc->magic != SCC_MAGIC) { dev_kfree_skb(skb, FREE_WRITE); return 0; } if (skb->len > scc->stat.bufsize || skb->len < 2) { scc->dev_stat.tx_dropped++; /* bogus frame */ dev_kfree_skb(skb, FREE_WRITE); return 0; } scc->dev_stat.tx_packets++; scc->stat.txframes++; kisscmd = *skb->data & 0x1f; skb_pull(skb, 1); if (kisscmd) { scc_set_param(scc, kisscmd, *skb->data); dev_kfree_skb(skb, FREE_WRITE); return 0; } save_flags(flags); cli(); scc_lock_dev(scc); if (scc->tx_next_buff != NULL) { printk(KERN_ERR "z8530drv: race condition, discarding frame\n"); dev_kfree_skb(skb, FREE_WRITE); scc_lock_dev(scc); restore_flags(flags); return 0; } dev->trans_start = jiffies; scc->tx_next_buff = skb; /* * Start transmission if the trx state is idle or * t_idle hasn't expired yet. Use dwait/persistance/slottime * algorithm for normal halfduplex operation. */ if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) { scc->stat.tx_state = TXS_BUSY; if (scc->kiss.fulldup == KISS_DUPLEX_HALF) scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime); else scc_start_tx_timer(scc, t_dwait, 0); } restore_flags(flags); return 0; } /* ----> ioctl functions <---- */ /* * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg * SIOCSCCINI - initialize driver arg: --- * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg */ static int scc_net_ioctl(struct device *dev, struct ifreq *ifr, int cmd) { struct scc_kiss_cmd kiss_cmd; struct scc_mem_config memcfg; struct scc_hw_config hwcfg; unsigned char device_name[10]; struct scc_channel *scc; int chan; void *arg; scc = (struct scc_channel *) dev->priv; if (scc == NULL || scc->magic != SCC_MAGIC) return -EINVAL; arg = (void *) ifr->ifr_data; if (!Driver_Initialized) { if (cmd == SIOCSCCCFG) { int found = 1; if (!suser()) return -EPERM; if (!arg) return -EFAULT; if (Nchips >= MAXSCC) return -EINVAL; if (copy_from_user(&hwcfg, arg, sizeof(hwcfg))) return -EFAULT; if (hwcfg.irq == 2) hwcfg.irq = 9; if (!Ivec[hwcfg.irq].used && hwcfg.irq) { if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL)) printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq); else Ivec[hwcfg.irq].used = 1; } if (hwcfg.vector_latch) Vector_Latch = hwcfg.vector_latch; if (hwcfg.clock == 0) hwcfg.clock = DEFAULT_CLOCK; #ifndef DONT_CHECK disable_irq(hwcfg.irq); check_region(scc->ctrl, 1); Outb(hwcfg.ctrl_a, 0); udelay(5); OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */ udelay(5); if (InReg(hwcfg.ctrl_a,R13) != 0x55) found = 0; enable_irq(hwcfg.irq); #endif if (found) { SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a; SCC_Info[2*Nchips ].data = hwcfg.data_a; SCC_Info[2*Nchips ].irq = hwcfg.irq; SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b; SCC_Info[2*Nchips+1].data = hwcfg.data_b; SCC_Info[2*Nchips+1].irq = hwcfg.irq; SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a; SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b; SCC_ctrl[Nchips].irq = hwcfg.irq; } for (chan = 0; chan < 2; chan++) { sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan); SCC_Info[2*Nchips+chan].special = hwcfg.special; SCC_Info[2*Nchips+chan].clock = hwcfg.clock; SCC_Info[2*Nchips+chan].brand = hwcfg.brand; SCC_Info[2*Nchips+chan].option = hwcfg.option; SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc; #ifdef DONT_CHECK printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n", device_name, SCC_Info[2*Nchips+chan].data, SCC_Info[2*Nchips+chan].ctrl); #else printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n", device_name, chan? hwcfg.data_b : hwcfg.data_a, chan? hwcfg.ctrl_b : hwcfg.ctrl_a, found? "found" : "missing"); #endif if (found) { request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl"); request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data"); if (Nchips+chan != 0) scc_net_setup(&SCC_Info[2*Nchips+chan], device_name); } } if (found) Nchips++; return 0; } if (cmd == SIOCSCCINI) { if (!suser()) return -EPERM; if (Nchips == 0) return -EINVAL; z8530_init(); return 0; } return -EINVAL; /* confuse the user */ } if (!scc->init) { if (cmd == SIOCSCCCHANINI) { if (!suser()) return -EPERM; if (!arg) return -EINVAL; scc->stat.bufsize = BUFSIZE; if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem))) return -EINVAL; /* default KISS Params */ if (scc->modem.speed < 4800) { scc->kiss.txdelay = 36; /* 360 ms */ scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */ scc->kiss.slottime = 16; /* 160 ms */ scc->kiss.tailtime = 4; /* minimal reasonable value */ scc->kiss.fulldup = 0; /* CSMA */ scc->kiss.waittime = 50; /* 500 ms */ scc->kiss.maxkeyup = 10; /* 10 s */ scc->kiss.mintime = 3; /* 3 s */ scc->kiss.idletime = 30; /* 30 s */ scc->kiss.maxdefer = 120; /* 2 min */ scc->kiss.softdcd = 0; /* hardware dcd */ } else { scc->kiss.txdelay = 10; /* 100 ms */ scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */ scc->kiss.slottime = 8; /* 160 ms */ scc->kiss.tailtime = 1; /* minimal reasonable value */ scc->kiss.fulldup = 0; /* CSMA */ scc->kiss.waittime = 50; /* 500 ms */ scc->kiss.maxkeyup = 7; /* 7 s */ scc->kiss.mintime = 3; /* 3 s */ scc->kiss.idletime = 30; /* 30 s */ scc->kiss.maxdefer = 120; /* 2 min */ scc->kiss.softdcd = 0; /* hardware dcd */ } scc->tx_buff = scc->tx_next_buff = NULL; scc->init = 1; return 0; } return -EINVAL; } switch(cmd) { case SIOCSCCRESERVED: return -ENOIOCTLCMD; case SIOCSCCSMEM: if (!suser()) return -EPERM; if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg))) return -EINVAL; scc->stat.bufsize = memcfg.bufsize; return 0; case SIOCSCCGSTAT: if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat))) return -EINVAL; return 0; case SIOCSCCGKISS: if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd))) return -EINVAL; kiss_cmd.param = scc_get_param(scc, kiss_cmd.command); if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd))) return -EINVAL; return 0; case SIOCSCCSKISS: if (!suser()) return -EPERM; if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd))) return -EINVAL; return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param); default: return -ENOIOCTLCMD; } return -EINVAL; } /* ----> set interface callsign <---- */ static int scc_net_set_mac_address(struct device *dev, void *addr) { struct sockaddr *sa = (struct sockaddr *) addr; memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); return 0; } /* ----> rebuild header <---- */ static int scc_net_rebuild_header(void *buff, struct device *dev, unsigned long raddr, struct sk_buff *skb) { return ax25_rebuild_header(buff, dev, raddr, skb); } /* ----> "hard" header <---- */ static int scc_net_header(struct sk_buff *skb, struct device *dev, unsigned short type, void *daddr, void *saddr, unsigned len) { return ax25_encapsulate(skb, dev, type, daddr, saddr, len); } /* ----> get statistics <---- */ static struct enet_statistics * scc_net_get_stats(struct device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; if (scc == NULL || scc->magic != SCC_MAGIC) return NULL; scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over; scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under; scc->dev_stat.rx_fifo_errors = scc->stat.rx_over; scc->dev_stat.tx_fifo_errors = scc->stat.tx_under; return &scc->dev_stat; } /* ******************************************************************** */ /* * dump statistics to /proc/net/z8530drv * */ /* ******************************************************************** */ static int scc_net_get_info(char *buffer, char **start, off_t offset, int length, int dummy) { struct scc_channel *scc; struct scc_kiss *kiss; struct scc_stat *stat; int len = 0; off_t pos = 0; off_t begin = 0; int k; len += sprintf(buffer, "z8530drv-"VERSION"\n"); if (!Driver_Initialized) { len += sprintf(buffer+len, "not initialized\n"); goto done; } if (!Nchips) { len += sprintf(buffer+len, "chips missing\n"); goto done; } for (k = 0; k < Nchips*2; k++) { scc = &SCC_Info[k]; stat = &scc->stat; kiss = &scc->kiss; if (!scc->init) continue; /* dev data ctrl irq clock brand enh vector special option * baud nrz clocksrc softdcd bufsize * rxints txints exints spints * rcvd rxerrs over / xmit txerrs under / nospace bufsize * txd pers slot tail ful wait min maxk idl defr txof grp * W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## * R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ## */ len += sprintf(buffer+len, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n", scc->dev->name, scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand, scc->enhanced, Vector_Latch, scc->special, scc->option); len += sprintf(buffer+len, "\t%lu %d %d %d %d\n", scc->modem.speed, scc->modem.nrz, scc->modem.clocksrc, kiss->softdcd, stat->bufsize); len += sprintf(buffer+len, "\t%lu %lu %lu %lu\n", stat->rxints, stat->txints, stat->exints, stat->spints); len += sprintf(buffer+len, "\t%lu %lu %d / %lu %lu %d / %d %d\n", stat->rxframes, stat->rxerrs, stat->rx_over, stat->txframes, stat->txerrs, stat->tx_under, stat->nospace, stat->tx_state); #define K(x) kiss->x len += sprintf(buffer+len, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n", K(txdelay), K(persist), K(slottime), K(tailtime), K(fulldup), K(waittime), K(mintime), K(maxkeyup), K(idletime), K(maxdefer), K(tx_inhibit), K(group)); #undef K #ifdef SCC_DEBUG { int reg; len += sprintf(buffer+len, "\tW "); for (reg = 0; reg < 16; reg++) len += sprintf(buffer+len, "%2.2x ", scc->wreg[reg]); len += sprintf(buffer+len, "\n"); len += sprintf(buffer+len, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1)); for (reg = 3; reg < 8; reg++) len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg)); len += sprintf(buffer+len, "XX "); for (reg = 9; reg < 16; reg++) len += sprintf(buffer+len, "%2.2x ", InReg(scc->ctrl, reg)); len += sprintf(buffer+len, "\n"); } #endif len += sprintf(buffer+len, "\n"); pos = begin + len; if (pos < offset) { len = 0; begin = pos; } if (pos > offset + length) break; } done: *start = buffer + (offset - begin); len -= (offset - begin); if (len > length) len = length; return len; } #ifdef CONFIG_PROC_FS struct proc_dir_entry scc_proc_dir_entry = { PROC_NET_Z8530, 8, "z8530drv", S_IFREG | S_IRUGO, 1, 0, 0, 0, &proc_net_inode_operations, scc_net_get_info }; #define scc_net_procfs_init() proc_net_register(&scc_proc_dir_entry); #define scc_net_procfs_remove() proc_net_unregister(PROC_NET_Z8530); #else #define scc_net_procfs_init() #define scc_net_procfs_remove() #endif /* ******************************************************************** */ /* * Init SCC driver * */ /* ******************************************************************** */ int scc_init (void) { int chip, chan, k, result; char devname[10]; printk(KERN_INFO BANNER); memset(&SCC_ctrl, 0, sizeof(SCC_ctrl)); /* pre-init channel information */ for (chip = 0; chip < MAXSCC; chip++) { memset((char *) &SCC_Info[2*chip ], 0, sizeof(struct scc_channel)); memset((char *) &SCC_Info[2*chip+1], 0, sizeof(struct scc_channel)); for (chan = 0; chan < 2; chan++) SCC_Info[2*chip+chan].magic = SCC_MAGIC; } for (k = 0; k < 16; k++) Ivec[k].used = 0; sprintf(devname,"%s0", SCC_DriverName); result = scc_net_setup(SCC_Info, devname); if (result) { printk(KERN_ERR "z8530drv: cannot initialize module\n"); return result; } scc_net_procfs_init(); return 0; } /* ******************************************************************** */ /* * Module support * */ /* ******************************************************************** */ #ifdef MODULE int init_module(void) { int result = 0; result = scc_init(); if (result == 0) printk(KERN_INFO "Copyright 1993,1996 Joerg Reuter DL1BKE (jreuter@lykos.tng.oche.de)\n"); return result; } void cleanup_module(void) { long flags; io_port ctrl; int k; struct scc_channel *scc; save_flags(flags); cli(); if (Nchips == 0) unregister_netdev(SCC_Info[0].dev); for (k = 0; k < Nchips; k++) if ( (ctrl = SCC_ctrl[k].chan_A) ) { Outb(ctrl, 0); OutReg(ctrl,R9,FHWRES); /* force hardware reset */ udelay(50); } for (k = 0; k < Nchips*2; k++) { scc = &SCC_Info[k]; if (scc) { release_region(scc->ctrl, 1); release_region(scc->data, 1); if (scc->dev) { unregister_netdev(scc->dev); kfree(scc->dev); } } } for (k=0; k < 16 ; k++) if (Ivec[k].used) free_irq(k, NULL); restore_flags(flags); scc_net_procfs_remove(); } #endif |