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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 | /* $Id: bitops.h,v 1.41 1996/12/28 18:14:25 davem Exp $ * bitops.h: Bit string operations on the Sparc. * * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) * Copyright 1996 Eddie C. Dost (ecd@skynet.be) */ #ifndef _SPARC_BITOPS_H #define _SPARC_BITOPS_H #include <linux/kernel.h> #ifndef __KERNEL__ /* User mode bitops, defined here for convenience. Note: these are not * atomic, so packages like nthreads should do some locking around these * themself. */ #define __SMPVOL extern __inline__ unsigned long set_bit(unsigned long nr, void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" ld [%0], %%g3 or %%g3, %2, %%g2 st %%g2, [%0] and %%g3, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask) : "g2", "g3"); return (unsigned long) ADDR; } extern __inline__ unsigned long clear_bit(unsigned long nr, void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" ld [%0], %%g3 andn %%g3, %2, %%g2 st %%g2, [%0] and %%g3, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask) : "g2", "g3"); return (unsigned long) ADDR; } extern __inline__ unsigned long change_bit(unsigned long nr, void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" ld [%0], %%g3 xor %%g3, %2, %%g2 st %%g2, [%0] and %%g3, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask) : "g2", "g3"); return (unsigned long) ADDR; } #else /* __KERNEL__ */ #include <asm/system.h> #ifdef __SMP__ #define __SMPVOL volatile #else #define __SMPVOL #endif /* Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' * is in the highest of the four bytes and bit '31' is the high bit * within the first byte. Sparc is BIG-Endian. Unless noted otherwise * all bit-ops return 0 if bit was previously clear and != 0 otherwise. */ extern __inline__ unsigned long set_bit(unsigned long nr, __SMPVOL void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" rd %%psr, %%g3 andcc %%g3, %3, %%g0 bne 1f nop wr %%g3, %3, %%psr nop nop nop 1: ld [%0], %%g4 or %%g4, %2, %%g2 andcc %%g3, %3, %%g0 st %%g2, [%0] bne 1f nop wr %%g3, 0x0, %%psr nop nop nop 1: and %%g4, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask), "i" (PSR_PIL) : "g2", "g3", "g4"); return (unsigned long) ADDR; } extern __inline__ unsigned long clear_bit(unsigned long nr, __SMPVOL void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" rd %%psr, %%g3 andcc %%g3, %3, %%g0 bne 1f nop wr %%g3, %3, %%psr nop nop nop 1: ld [%0], %%g4 andn %%g4, %2, %%g2 andcc %%g3, %3, %%g0 st %%g2, [%0] bne 1f nop wr %%g3, 0x0, %%psr nop nop nop 1: and %%g4, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask), "i" (PSR_PIL) : "g2", "g3", "g4"); return (unsigned long) ADDR; } extern __inline__ unsigned long change_bit(unsigned long nr, __SMPVOL void *addr) { int mask; unsigned long *ADDR = (unsigned long *) addr; ADDR += nr >> 5; mask = 1 << (nr & 31); __asm__ __volatile__(" rd %%psr, %%g3 andcc %%g3, %3, %%g0 bne 1f nop wr %%g3, %3, %%psr nop nop nop 1: ld [%0], %%g4 xor %%g4, %2, %%g2 andcc %%g3, %3, %%g0 st %%g2, [%0] bne 1f nop wr %%g3, 0x0, %%psr nop nop nop 1: and %%g4, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask), "i" (PSR_PIL) : "g2", "g3", "g4"); return (unsigned long) ADDR; } #endif /* __KERNEL__ */ /* The following routine need not be atomic. */ extern __inline__ unsigned long test_bit(int nr, __const__ __SMPVOL void *addr) { return 1UL & (((__const__ unsigned int *) addr)[nr >> 5] >> (nr & 31)); } /* The easy/cheese version for now. */ extern __inline__ unsigned long ffz(unsigned long word) { unsigned long result = 0; while(word & 1) { result++; word >>= 1; } return result; } /* find_next_zero_bit() finds the first zero bit in a bit string of length * 'size' bits, starting the search at bit 'offset'. This is largely based * on Linus's ALPHA routines, which are pretty portable BTW. */ extern __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if (offset) { tmp = *(p++); tmp |= ~0UL >> (32-offset); if (size < 32) goto found_first; if (~tmp) goto found_middle; size -= 32; result += 32; } while (size & ~31UL) { if (~(tmp = *(p++))) goto found_middle; result += 32; size -= 32; } if (!size) return result; tmp = *p; found_first: tmp |= ~0UL << size; found_middle: return result + ffz(tmp); } /* Linus sez that gcc can optimize the following correctly, we'll see if this * holds on the Sparc as it does for the ALPHA. */ #define find_first_zero_bit(addr, size) \ find_next_zero_bit((addr), (size), 0) #ifndef __KERNEL__ extern __inline__ int set_le_bit(int nr, void *addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); __asm__ __volatile__(" ldub [%0], %%g3 or %%g3, %2, %%g2 stb %%g2, [%0] and %%g3, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask) : "g2", "g3"); return (int) ADDR; } extern __inline__ int clear_le_bit(int nr, void *addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); __asm__ __volatile__(" ldub [%0], %%g3 andn %%g3, %2, %%g2 stb %%g2, [%0] and %%g3, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask) : "g2", "g3"); return (int) ADDR; } #else /* __KERNEL__ */ /* Now for the ext2 filesystem bit operations and helper routines. */ extern __inline__ int set_le_bit(int nr,void * addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); __asm__ __volatile__(" rd %%psr, %%g3 andcc %%g3, %3, %%g0 bne 1f nop wr %%g3, %3, %%psr nop nop nop 1: ldub [%0], %%g4 or %%g4, %2, %%g2 andcc %%g3, %3, %%g0 stb %%g2, [%0] bne 1f nop wr %%g3, 0x0, %%psr nop nop nop 1: and %%g4, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask), "i" (PSR_PIL) : "g2", "g3", "g4"); return (int) ADDR; } extern __inline__ int clear_le_bit(int nr, void * addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); __asm__ __volatile__(" rd %%psr, %%g3 andcc %%g3, %3, %%g0 bne 1f nop wr %%g3, %3, %%psr nop nop nop 1: ldub [%0], %%g4 andn %%g4, %2, %%g2 andcc %%g3, %3, %%g0 stb %%g2, [%0] bne 1f nop wr %%g3, 0x0, %%psr nop nop nop 1: and %%g4, %2, %0 " : "=&r" (ADDR) : "0" (ADDR), "r" (mask), "i" (PSR_PIL) : "g2", "g3", "g4"); return (int) ADDR; } #endif /* __KERNEL__ */ extern __inline__ int test_le_bit(int nr, __const__ void * addr) { int mask; __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); return ((mask & *ADDR) != 0); } #ifdef __KERNEL__ #define ext2_set_bit set_le_bit #define ext2_clear_bit clear_le_bit #define ext2_test_bit test_le_bit #endif /* __KERNEL__ */ #define find_first_zero_le_bit(addr, size) \ find_next_zero_le_bit((addr), (size), 0) extern __inline__ unsigned long __swab32(unsigned long value) { return((value>>24) | ((value>>8)&0xff00) | ((value<<8)&0xff0000) | (value<<24)); } extern __inline__ unsigned long find_next_zero_le_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if(offset) { tmp = *(p++); tmp |= __swab32(~0UL >> (32-offset)); if(size < 32) goto found_first; if(~tmp) goto found_middle; size -= 32; result += 32; } while(size & ~31UL) { if(~(tmp = *(p++))) goto found_middle; result += 32; size -= 32; } if(!size) return result; tmp = *p; found_first: return result + ffz(__swab32(tmp) | (~0UL << size)); found_middle: return result + ffz(__swab32(tmp)); } #ifdef __KERNEL__ #define ext2_find_first_zero_bit find_first_zero_le_bit #define ext2_find_next_zero_bit find_next_zero_le_bit /* Bitmap functions for the minix filesystem. */ #define minix_set_bit(nr,addr) set_bit(nr,addr) #define minix_clear_bit(nr,addr) clear_bit(nr,addr) #define minix_test_bit(nr,addr) test_bit(nr,addr) #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) #endif /* __KERNEL__ */ #endif /* defined(_SPARC_BITOPS_H) */ |