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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 | #define AUTOSENSE #define PSEUDO_DMA #define DONT_USE_INTR #define UNSAFE /* Leave interrupts enabled during pseudo-dma I/O */ #define xNDEBUG (NDEBUG_INTR+NDEBUG_RESELECTION+\ NDEBUG_SELECTION+NDEBUG_ARBITRATION) #define DMA_WORKS_RIGHT /* * DTC 3180/3280 driver, by * Ray Van Tassle rayvt@comm.mot.com * * taken from ... * Trantor T128/T128F/T228 driver by... * * Drew Eckhardt * Visionary Computing * (Unix and Linux consulting and custom programming) * drew@colorado.edu * +1 (303) 440-4894 * * DISTRIBUTION RELEASE 1. * * For more information, please consult * * NCR 5380 Family * SCSI Protocol Controller * Databook */ /* * Options : * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically * for commands that return with a CHECK CONDITION status. * * PSEUDO_DMA - enables PSEUDO-DMA hardware, should give a 3-4X performance * increase compared to polled I/O. * * PARITY - enable parity checking. Not supported. * * UNSAFE - leave interrupts enabled during pseudo-DMA transfers. * You probably want this. * * The card is detected and initialized in one of several ways : * 1. Autoprobe (default) - since the board is memory mapped, * a BIOS signature is scanned for to locate the registers. * An interrupt is triggered to autoprobe for the interrupt * line. * * 2. With command line overrides - dtc=address,irq may be * used on the LILO command line to override the defaults. * */ /*----------------------------------------------------------------*/ /* the following will set the monitor border color (useful to find where something crashed or gets stuck at */ /* 1 = blue 2 = green 3 = cyan 4 = red 5 = magenta 6 = yellow 7 = white */ #if 0 #define rtrc(i) {inb(0x3da); outb(0x31, 0x3c0); outb((i), 0x3c0);} #else #define rtrc(i) {} #endif #include <asm/system.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/blk.h> #include <asm/io.h> #include "scsi.h" #include "hosts.h" #include "dtc.h" #define AUTOPROBE_IRQ #include "NCR5380.h" #include "constants.h" #include "sd.h" #include <linux/stat.h> #include <linux/string.h> #include <linux/init.h> #define DTC_PUBLIC_RELEASE 2 /*#define DTCDEBUG 0x1*/ #define DTCDEBUG_INIT 0x1 #define DTCDEBUG_TRANSFER 0x2 /* * The DTC3180 & 3280 boards are memory mapped. * */ /* */ /* Offset from DTC_5380_OFFSET */ #define DTC_CONTROL_REG 0x100 /* rw */ #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */ #define CSR_DIR_READ 0x40 /* rw direction, 1 = read 0 = write */ #define CSR_RESET 0x80 /* wo Resets 53c400 */ #define CSR_5380_REG 0x80 /* ro 5380 registers can be accessed */ #define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */ #define CSR_SCSI_BUFF_INTR 0x20 /* rw Enable int on transfer ready */ #define CSR_5380_INTR 0x10 /* rw Enable 5380 interrupts */ #define CSR_SHARED_INTR 0x08 /* rw Interrupt sharing */ #define CSR_HOST_BUF_NOT_RDY 0x04 /* ro Host buffer not ready */ #define CSR_SCSI_BUF_RDY 0x02 /* ro SCSI buffer ready */ #define CSR_GATED_5380_IRQ 0x01 /* ro Last block xferred */ #define CSR_INT_BASE (CSR_SCSI_BUFF_INTR | CSR_5380_INTR) #define DTC_BLK_CNT 0x101 /* rw * # of 128-byte blocks to transfer */ #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */ #define DTC_SWITCH_REG 0x3982 /* ro - DIP switches */ #define DTC_RESUME_XFER 0x3982 /* wo - resume data xfer * after disconnect/reconnect*/ #define DTC_5380_OFFSET 0x3880 /* 8 registers here, see NCR5380.h */ /*!!!! for dtc, it's a 128 byte buffer at 3900 !!! */ #define DTC_DATA_BUF 0x3900 /* rw 128 bytes long */ struct proc_dir_entry proc_scsi_dtc = { PROC_SCSI_T128, 7, "dtc3x80", S_IFDIR | S_IRUGO | S_IXUGO, 2 }; static struct override { unsigned int address; int irq; } overrides #ifdef OVERRIDE [] __initdata = OVERRIDE; #else [4] __initdata = {{0, IRQ_AUTO}, {0, IRQ_AUTO}, {0, IRQ_AUTO}, {0, IRQ_AUTO}}; #endif #define NO_OVERRIDES (sizeof(overrides) / sizeof(struct override)) static struct base { unsigned int address; int noauto; } bases[] __initdata = {{0xcc000, 0}, {0xc8000, 0}, {0xdc000, 0}, {0xd8000, 0}}; #define NO_BASES (sizeof (bases) / sizeof (struct base)) static const struct signature { const char *string; int offset; } signatures[] = { {"DATA TECHNOLOGY CORPORATION BIOS", 0x25}, }; #define NO_SIGNATURES (sizeof (signatures) / sizeof (struct signature)) /* * Function : dtc_setup(char *str, int *ints) * * Purpose : LILO command line initialization of the overrides array, * * Inputs : str - unused, ints - array of integer parameters with ints[0] * equal to the number of ints. * */ __initfunc(void dtc_setup(char *str, int *ints)) { static int commandline_current = 0; int i; if (ints[0] != 2) printk("dtc_setup: usage dtc=address,irq\n"); else if (commandline_current < NO_OVERRIDES) { overrides[commandline_current].address = ints[1]; overrides[commandline_current].irq = ints[2]; for (i = 0; i < NO_BASES; ++i) if (bases[i].address == ints[1]) { bases[i].noauto = 1; break; } ++commandline_current; } } /* * Function : int dtc_detect(Scsi_Host_Template * tpnt) * * Purpose : detects and initializes DTC 3180/3280 controllers * that were autoprobed, overridden on the LILO command line, * or specified at compile time. * * Inputs : tpnt - template for this SCSI adapter. * * Returns : 1 if a host adapter was found, 0 if not. * */ __initfunc(int dtc_detect(Scsi_Host_Template * tpnt)) { static int current_override = 0, current_base = 0; struct Scsi_Host *instance; unsigned int base; int sig, count; tpnt->proc_dir = &proc_scsi_dtc; tpnt->proc_info = &dtc_proc_info; for (count = 0; current_override < NO_OVERRIDES; ++current_override) { base = 0; if (overrides[current_override].address) base = overrides[current_override].address; else for (; !base && (current_base < NO_BASES); ++current_base) { #if (DTCDEBUG & DTCDEBUG_INIT) printk("scsi-dtc : probing address %08x\n", bases[current_base].address); #endif for (sig = 0; sig < NO_SIGNATURES; ++sig) if (!bases[current_base].noauto && check_signature(bases[current_base].address + signatures[sig].offset, signatures[sig].string, strlen(signatures[sig].string))) { base = bases[current_base].address; #if (DTCDEBUG & DTCDEBUG_INIT) printk("scsi-dtc : detected board.\n"); #endif break; } } #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT) printk("scsi-dtc : base = %08x\n", base); #endif if (!base) break; instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); instance->base = (void *)base; NCR5380_init(instance, 0); NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); /* Enable int's */ if (overrides[current_override].irq != IRQ_AUTO) instance->irq = overrides[current_override].irq; else instance->irq = NCR5380_probe_irq(instance, DTC_IRQS); #ifndef DONT_USE_INTR /* With interrupts enabled, it will sometimes hang when doing heavy * reads. So better not enable them until I finger it out. */ if (instance->irq != IRQ_NONE) if (request_irq(instance->irq, do_dtc_intr, SA_INTERRUPT, "dtc")) { printk("scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); instance->irq = IRQ_NONE; } if (instance->irq == IRQ_NONE) { printk("scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no); printk("scsi%d : please jumper the board for a free IRQ.\n", instance->host_no); } #else if (instance->irq != IRQ_NONE) printk("scsi%d : interrupts not used. Might as well not jumper it.\n", instance->host_no); instance->irq = IRQ_NONE; #endif #if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT) printk("scsi%d : irq = %d\n", instance->host_no, instance->irq); #endif printk("scsi%d : at 0x%05X", instance->host_no, (int)instance->base); if (instance->irq == IRQ_NONE) printk (" interrupts disabled"); else printk (" irq %d", instance->irq); printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d", CAN_QUEUE, CMD_PER_LUN, DTC_PUBLIC_RELEASE); NCR5380_print_options(instance); printk("\n"); ++current_override; ++count; } return count; } /* * Function : int dtc_biosparam(Disk * disk, kdev_t dev, int *ip) * * Purpose : Generates a BIOS / DOS compatible H-C-S mapping for * the specified device / size. * * Inputs : size = size of device in sectors (512 bytes), dev = block device * major / minor, ip[] = {heads, sectors, cylinders} * * Returns : always 0 (success), initializes ip * */ /* * XXX Most SCSI boards use this mapping, I could be incorrect. Some one * using hard disks on a trantor should verify that this mapping corresponds * to that used by the BIOS / ASPI driver by running the linux fdisk program * and matching the H_C_S coordinates to what DOS uses. */ int dtc_biosparam(Disk * disk, kdev_t dev, int * ip) { int size = disk->capacity; ip[0] = 64; ip[1] = 32; ip[2] = size >> 11; return 0; } /**************************************************************** * Function : int NCR5380_pread (struct Scsi_Host *instance, * unsigned char *dst, int len) * * Purpose : Fast 5380 pseudo-dma read function, reads len bytes to * dst * * Inputs : dst = destination, len = length in bytes * * Returns : 0 on success, non zero on a failure such as a watchdog * timeout. */ static int dtc_maxi = 0; static int dtc_wmaxi = 0; static inline int NCR5380_pread (struct Scsi_Host *instance, unsigned char *dst, int len) { unsigned char *d = dst; int i; /* For counting time spent in the poll-loop */ NCR5380_local_declare(); NCR5380_setup(instance); i = 0; NCR5380_read(RESET_PARITY_INTERRUPT_REG); NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE); if (instance->irq == IRQ_NONE) NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ); else NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ | CSR_INT_BASE); NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */ rtrc(1); while (len > 0) { rtrc(2); while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY) ++i; rtrc(3); memcpy_fromio(d, base + DTC_DATA_BUF, 128); d += 128; len -= 128; rtrc(7); /*** with int's on, it sometimes hangs after here. * Looks like something makes HBNR go away. */ } rtrc(4); while ( !(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS)) ++i; NCR5380_write(MODE_REG, 0); /* Clear the operating mode */ rtrc(0); NCR5380_read(RESET_PARITY_INTERRUPT_REG); if (i > dtc_maxi) dtc_maxi = i; return(0); } /**************************************************************** * Function : int NCR5380_pwrite (struct Scsi_Host *instance, * unsigned char *src, int len) * * Purpose : Fast 5380 pseudo-dma write function, transfers len bytes from * src * * Inputs : src = source, len = length in bytes * * Returns : 0 on success, non zero on a failure such as a watchdog * timeout. */ static inline int NCR5380_pwrite (struct Scsi_Host *instance, unsigned char *src, int len) { int i; NCR5380_local_declare(); NCR5380_setup(instance); NCR5380_read(RESET_PARITY_INTERRUPT_REG); NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE); /* set direction (write) */ if (instance->irq == IRQ_NONE) NCR5380_write(DTC_CONTROL_REG, 0); else NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */ for (i = 0; len > 0; ++i) { rtrc(5); /* Poll until the host buffer can accept data. */ while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY) ++i; rtrc(3); memcpy_toio(base + DTC_DATA_BUF, src, 128); src += 128; len -= 128; } rtrc(4); while ( !(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS)) ++i; rtrc(6); /* Wait until the last byte has been sent to the disk */ while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT)) ++i; rtrc(7); /* Check for parity error here. fixme. */ NCR5380_write(MODE_REG, 0); /* Clear the operating mode */ rtrc(0); if (i > dtc_wmaxi) dtc_wmaxi = i; return (0); } #include "NCR5380.c" #ifdef MODULE /* Eventually this will go into an include file, but this will be later */ Scsi_Host_Template driver_template = DTC3x80; #include "scsi_module.c" #endif |