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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 | /* spinlock.h: 32-bit Sparc spinlock support. * * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) */ #ifndef __SPARC_SPINLOCK_H #define __SPARC_SPINLOCK_H #ifndef __ASSEMBLY__ #ifndef __SMP__ typedef unsigned char spinlock_t; #define SPIN_LOCK_UNLOCKED 0 #define spin_lock_init(lock) do { } while(0) #define spin_lock(lock) do { } while(0) #define spin_trylock(lock) do { } while(0) #define spin_unlock_wait(lock) do { } while(0) #define spin_unlock(lock) do { } while(0) #define spin_lock_irq(lock) cli() #define spin_unlock_irq(lock) sti() #define spin_lock_irqsave(lock, flags) save_and_cli(flags) #define spin_unlock_irqrestore(lock, flags) restore_flags(flags) /* * Read-write spinlocks, allowing multiple readers * but only one writer. * * NOTE! it is quite common to have readers in interrupts * but no interrupt writers. For those circumstances we * can "mix" irq-safe locks - any writer needs to get a * irq-safe write-lock, but readers can get non-irqsafe * read-locks. */ typedef struct { } rwlock_t; #define RW_LOCK_UNLOCKED { } #define read_lock(lock) do { } while(0) #define read_unlock(lock) do { } while(0) #define write_lock(lock) do { } while(0) #define write_unlock(lock) do { } while(0) #define read_lock_irq(lock) cli() #define read_unlock_irq(lock) sti() #define write_lock_irq(lock) cli() #define write_unlock_irq(lock) sti() #define read_lock_irqsave(lock, flags) save_and_cli(flags) #define read_unlock_irqrestore(lock, flags) restore_flags(flags) #define write_lock_irqsave(lock, flags) save_and_cli(flags) #define write_unlock_irqrestore(lock, flags) restore_flags(flags) #else /* !(__SMP__) */ #include <asm/psr.h> /* Define this to use the verbose/debugging versions in arch/sparc/lib/debuglocks.c */ #define SPIN_LOCK_DEBUG #ifdef SPIN_LOCK_DEBUG struct _spinlock_debug { unsigned char lock; unsigned long owner_pc; }; typedef struct _spinlock_debug spinlock_t; #define SPIN_LOCK_UNLOCKED { 0, 0 } #define spin_lock_init(lp) do { (lp)->owner_pc = 0; (lp)->lock = 0; } while(0) #define spin_unlock_wait(lp) do { barrier(); } while(*(volatile unsigned char *)(&(lp)->lock)) extern void _do_spin_lock(spinlock_t *lock, char *str); extern int _spin_trylock(spinlock_t *lock); extern void _do_spin_unlock(spinlock_t *lock); #define spin_trylock(lp) _spin_trylock(lp) #define spin_lock(lock) _do_spin_lock(lock, "spin_lock") #define spin_lock_irq(lock) do { __cli(); _do_spin_lock(lock, "spin_lock_irq"); } while(0) #define spin_lock_irqsave(lock, flags) do { __save_and_cli(flags); _do_spin_lock(lock, "spin_lock_irqsave"); } while(0) #define spin_unlock(lock) _do_spin_unlock(lock) #define spin_unlock_irq(lock) do { _do_spin_unlock(lock); __sti(); } while(0) #define spin_unlock_irqrestore(lock, flags) do { _do_spin_unlock(lock); __restore_flags(flags); } while(0) struct _rwlock_debug { volatile unsigned int lock; unsigned long owner_pc; unsigned long reader_pc[NCPUS]; }; typedef struct _rwlock_debug rwlock_t; #define RW_LOCK_UNLOCKED { 0, 0, {0} } extern void _do_read_lock(rwlock_t *rw, char *str); extern void _do_read_unlock(rwlock_t *rw, char *str); extern void _do_write_lock(rwlock_t *rw, char *str); extern void _do_write_unlock(rwlock_t *rw); #define read_lock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _do_read_lock(lock, "read_lock"); \ __restore_flags(flags); \ } while(0) #define read_lock_irq(lock) do { __cli(); _do_read_lock(lock, "read_lock_irq"); } while(0) #define read_lock_irqsave(lock, flags) do { __save_and_cli(flags); _do_read_lock(lock, "read_lock_irqsave"); } while(0) #define read_unlock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _do_read_unlock(lock, "read_unlock"); \ __restore_flags(flags); \ } while(0) #define read_unlock_irq(lock) do { _do_read_unlock(lock, "read_unlock_irq"); __sti() } while(0) #define read_unlock_irqrestore(lock, flags) do { _do_read_unlock(lock, "read_unlock_irqrestore"); __restore_flags(flags); } while(0) #define write_lock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _do_write_lock(lock, "write_lock"); \ __restore_flags(flags); \ } while(0) #define write_lock_irq(lock) do { __cli(); _do_write_lock(lock, "write_lock_irq"); } while(0) #define write_lock_irqsave(lock, flags) do { __save_and_cli(flags); _do_write_lock(lock, "write_lock_irqsave"); } while(0) #define write_unlock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _do_write_unlock(lock); \ __restore_flags(flags); \ } while(0) #define write_unlock_irq(lock) do { _do_write_unlock(lock); __sti(); } while(0) #define write_unlock_irqrestore(lock, flags) do { _do_write_unlock(lock); __restore_flags(flags); } while(0) #else /* !SPIN_LOCK_DEBUG */ typedef unsigned char spinlock_t; #define SPIN_LOCK_UNLOCKED 0 #define spin_lock_init(lock) (*(lock) = 0) #define spin_unlock_wait(lock) do { barrier(); } while(*(volatile spinlock_t *)lock) extern __inline__ void spin_lock(spinlock_t *lock) { __asm__ __volatile__(" 1: ldstub [%0], %%g2 orcc %%g2, 0x0, %%g0 bne,a 2f ldub [%0], %%g2 .text 2 2: orcc %%g2, 0x0, %%g0 bne,a 2b ldub [%0], %%g2 b,a 1b .previous " : /* no outputs */ : "r" (lock) : "g2", "memory", "cc"); } extern __inline__ int spin_trylock(spinlock_t *lock) { unsigned int result; __asm__ __volatile__("ldstub [%1], %0" : "=r" (result) : "r" (lock) : "memory"); return (result == 0); } extern __inline__ void spin_unlock(spinlock_t *lock) { __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); } extern __inline__ void spin_lock_irq(spinlock_t *lock) { __asm__ __volatile__(" rd %%psr, %%g2 or %%g2, %0, %%g2 wr %%g2, 0x0, %%psr nop; nop; nop; 1: ldstub [%1], %%g2 orcc %%g2, 0x0, %%g0 bne,a 2f ldub [%1], %%g2 .text 2 2: orcc %%g2, 0x0, %%g0 bne,a 2b ldub [%1], %%g2 b,a 1b .previous " : /* No outputs */ : "i" (PSR_PIL), "r" (lock) : "g2", "memory", "cc"); } extern __inline__ void spin_unlock_irq(spinlock_t *lock) { __asm__ __volatile__(" rd %%psr, %%g2 andn %%g2, %1, %%g2 stb %%g0, [%0] wr %%g2, 0x0, %%psr nop; nop; nop; " : /* No outputs. */ : "r" (lock), "i" (PSR_PIL) : "g2", "memory"); } #define spin_lock_irqsave(lock, flags) \ do { \ register spinlock_t *lp asm("g1"); \ lp = lock; \ __asm__ __volatile__( \ "rd %%psr, %0\n\t" \ "or %0, %1, %%g2\n\t" \ "wr %%g2, 0x0, %%psr\n\t" \ "nop; nop; nop;\n" \ "1:\n\t" \ "ldstub [%2], %%g2\n\t" \ "orcc %%g2, 0x0, %%g0\n\t" \ "bne,a 2f\n\t" \ " ldub [%2], %%g2\n\t" \ ".text 2\n" \ "2:\n\t" \ "orcc %%g2, 0x0, %%g0\n\t" \ "bne,a 2b\n\t" \ " ldub [%2], %%g2\n\t" \ "b,a 1b\n\t" \ ".previous\n" \ : "=r" (flags) \ : "i" (PSR_PIL), "r" (lp) \ : "g2", "memory", "cc"); \ } while(0) extern __inline__ void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) { __asm__ __volatile__(" stb %%g0, [%0] wr %1, 0x0, %%psr nop; nop; nop; " : /* No outputs. */ : "r" (lock), "r" (flags) : "memory", "cc"); } /* Read-write spinlocks, allowing multiple readers * but only one writer. * * NOTE! it is quite common to have readers in interrupts * but no interrupt writers. For those circumstances we * can "mix" irq-safe locks - any writer needs to get a * irq-safe write-lock, but readers can get non-irqsafe * read-locks. * * XXX This might create some problems with my dual spinlock * XXX scheme, deadlocks etc. -DaveM */ typedef struct { volatile unsigned int lock; } rwlock_t; #define RW_LOCK_UNLOCKED { 0 } /* Sort of like atomic_t's on Sparc, but even more clever. * * ------------------------------------ * | 24-bit counter | wlock | rwlock_t * ------------------------------------ * 31 8 7 0 * * wlock signifies the one writer is in or somebody is updating * counter. For a writer, if he successfully acquires the wlock, * but counter is non-zero, he has to release the lock and wait, * till both counter and wlock are zero. * * Unfortunately this scheme limits us to ~16,000,000 cpus. */ extern __inline__ void _read_lock(rwlock_t *rw) { register rwlock_t *lp asm("g1"); lp = rw; __asm__ __volatile__(" mov %%o7, %%g4 call ___rw_read_enter ldstub [%%g1 + 3], %%g2 " : /* no outputs */ : "r" (lp) : "g2", "g4", "g7", "memory", "cc"); } #define read_lock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _read_lock(lock); \ __restore_flags(flags); \ } while(0) extern __inline__ void _read_unlock(rwlock_t *rw) { register rwlock_t *lp asm("g1"); lp = rw; __asm__ __volatile__(" mov %%o7, %%g4 call ___rw_read_exit ldstub [%%g1 + 3], %%g2 " : /* no outputs */ : "r" (lp) : "g2", "g4", "g7", "memory", "cc"); } #define read_unlock(lock) \ do { unsigned long flags; \ __save_and_cli(flags); \ _read_unlock(lock); \ __restore_flags(flags); \ } while(0) extern __inline__ void write_lock(rwlock_t *rw) { register rwlock_t *lp asm("g1"); lp = rw; __asm__ __volatile__(" mov %%o7, %%g4 call ___rw_write_enter ldstub [%%g1 + 3], %%g2 " : /* no outputs */ : "r" (lp) : "g2", "g4", "g7", "memory", "cc"); } #define write_unlock(rw) do { (rw)->lock = 0; } while(0) #define read_lock_irq(lock) do { __cli(); _read_lock(lock); } while (0) #define read_unlock_irq(lock) do { _read_unlock(lock); __sti(); } while (0) #define write_lock_irq(lock) do { __cli(); write_lock(lock); } while (0) #define write_unlock_irq(lock) do { write_unlock(lock); __sti(); } while (0) #define read_lock_irqsave(lock, flags) \ do { __save_and_cli(flags); _read_lock(lock); } while (0) #define read_unlock_irqrestore(lock, flags) \ do { _read_unlock(lock); __restore_flags(flags); } while (0) #define write_lock_irqsave(lock, flags) \ do { __save_and_cli(flags); write_lock(lock); } while (0) #define write_unlock_irqrestore(lock, flags) \ do { write_unlock(lock); __restore_flags(flags); } while (0) #endif /* SPIN_LOCK_DEBUG */ #endif /* __SMP__ */ #endif /* !(__ASSEMBLY__) */ #endif /* __SPARC_SPINLOCK_H */ |